METHODS AND SYSTEMS FOR APPLYING AN IMPROVED INTERLEAVER FOR MODEMS OPERATING ON POWER GRID

• US 20170359149A1
• Filed: 06/08/2016
• Published: 12/14/2017
• Est. Priority Date: 06/08/2016
• Status: Active Grant

• Current Assignee: Echelon Corporation (Renesas Electronics Corporation)
• Original Assignee: Echelon Corporation (Renesas Electronics Corporation)
• Inventors: Downey, Walter
• Granted Patent: US 10,135,467 B2
• Time in Patent Office: Days
• CPC Class Codes: H03M 13/2789 Interleaver providing variable interleaving, e.g. variable block sizes
• CPC Class Codes: H03M 13/2792 Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
• CPC Class Codes: H04L 1/0009 by adapting the channel coding H04L1/1812 takes precedence
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27

Abstract

Methods and systems are disclosed for applying an interleaver that better distributes signal errors to be used in devices operating on low voltage power grids. One embodiment of a method comprises: determining a frequency cycle of the communication medium; setting an interleaver block size based on the frequency cycle of the communication medium; re-arranging bits in a data packet based on the interleaver block size; transmitting the re-arranged data packet over the communication medium to a receiver. Specifically, according to an embodiment, the interleaver block size is set to one-half of the frequency cycle of the communication medium.

Claims

1. A method for transmitting data over a communication medium using interleaver error distribution, the method comprising:

determining a frequency cycle of the communication medium;

setting an interleaver block size based on the determined frequency cycle of the communication medium;

rearranging bits in a data packet based on the interleaver block size; and

transmitting the re-arranged data packet over the communication medium to a receiver.

2. The method of claim 1, wherein setting the interleaver block size further comprises setting the interleaver block size to one-half of the frequency cycle of the communication medium.

3. The method of claim 1, wherein the communication medium is a low voltage power grid.

4. The method of claim 1, wherein the communication medium uses an alternating current (AC) waveform as a frequency of 50 Hz.

5. The method of claim 1, wherein the communication medium uses an alternating current (AC) waveform as a frequency of 60 Hz.

8. The system of claim 1, wherein the communication medium is a low voltage power grid.

9. The system of claim 1, wherein the communication medium uses an alternating current (AC) waveform as a frequency of 50 Hz.

10. The system of claim 1, wherein the communication medium uses an alternating current (AC) waveform as a frequency of 60 Hz.

6. A system for transmitting data over a communication medium using an interleaver error distribution, the system comprising:

a frequency detector circuit to detect a frequency cycle of the communication medium;

a interleaver processor to

set an interleaver block size based on the frequency cycle of the communication medium;

re-arrange bits in a data packet based on the interleaver block size; and

an input/output (I/O) module to transmit the re-arranged data packet over the communication medium.

7. The system of claim 6, wherein setting the interleaver block size further comprises setting the interleaver block size to one-half of the frequency cycle of the communication medium.