GATE BOOSTING CIRCUIT AND METHOD FOR AN INTEGRATED POWER STAGE
First Claim
1. A gate driver comprising:
- an output stage comprising an n-channel metal-oxide-semiconductor (NMOS) pull-up transistor and an NMOS pull-down transistor, wherein the NMOS pull-up transistor and the NMOS pull-down transistor are coupled at an output node;
a bootstrap circuit comprising a main bootstrap capacitor, wherein the bootstrap capacitor provides a supply voltage for driving the NMOS pull-up transistor;
a high voltage generator coupled with the main bootstrap capacitor via a transistor switch; and
a replica bootstrap circuit comprising a replica bootstrap capacitor, wherein the replica bootstrap circuit generates a reference voltage that regulates a drain current of the transistor switch, and wherein the regulated drain current of the transistor switch charges the main bootstrap capacitor from the high voltage generator.
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Accused Products
Abstract
Systems and methods according to one or more embodiments are provided for gate boosted drivers for integrated power stages. In one example, a gate driver includes an output stage comprising an n-channel metal-oxide-semiconductor (NMOS) pull-up transistor and an NMOS pull-down transistor, where the NMOS pull-up transistor and the NMOS pull-down transistor are coupled at an output node. The gate driver further includes a bootstrap circuit comprising a main bootstrap capacitor, where the bootstrap capacitor provides a supply voltage for driving the NMOS pull-up transistor. The gate driver further includes a high voltage generator coupled with the main bootstrap capacitor via a transistor switch and a replica bootstrap circuit comprising a replica bootstrap capacitor. The replica bootstrap circuit generates a reference voltage that regulates a drain current of the transistor switch, and the regulated drain current of the transistor switch charges the main bootstrap capacitor from the high voltage generator.
22 Citations
20 Claims
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1. A gate driver comprising:
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an output stage comprising an n-channel metal-oxide-semiconductor (NMOS) pull-up transistor and an NMOS pull-down transistor, wherein the NMOS pull-up transistor and the NMOS pull-down transistor are coupled at an output node; a bootstrap circuit comprising a main bootstrap capacitor, wherein the bootstrap capacitor provides a supply voltage for driving the NMOS pull-up transistor; a high voltage generator coupled with the main bootstrap capacitor via a transistor switch; and a replica bootstrap circuit comprising a replica bootstrap capacitor, wherein the replica bootstrap circuit generates a reference voltage that regulates a drain current of the transistor switch, and wherein the regulated drain current of the transistor switch charges the main bootstrap capacitor from the high voltage generator. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for operating a gate driver for an integrated power stage comprising:
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charging a main bootstrap capacitor; charging a replica bootstrap capacitor; providing a supply voltage for driving a pull-up NMOS transistor from the main bootstrap capacitor; providing a reference voltage at a gate terminal of a transistor switch, wherein the reference voltage regulates a drain current of the transistor switch and wherein the regulated drain current of the transistor switch charges the main bootstrap capacitor from a high voltage generator; and conducting the drain current through the transistor switch when a voltage across the bootstrap capacitor is below the reference voltage by a threshold voltage of the transistor switch. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification