SYSTEMS AND METHODS FOR MEASURING ISOLATION RESISTANCE

• US 20180074108A1
• Filed: 09/14/2016
• Published: 03/15/2018
• Est. Priority Date: 09/14/2016
• Status: Active Grant

• Current Assignee: CPS Technology Holdings, LLC
• Original Assignee: Johnson Controls Technology Company (Johnson Controls International plc)
• Inventors: Dulle, Ronald J., Johnson, Mark R.
• Granted Patent: US 10,295,584 B2
• Time in Patent Office: Days
• CPC Class Codes: B60L 58/10 for monitoring or controlling batteries
• CPC Class Codes: G01R 27/025 Measuring very high resistances, e.g. isolation resistances, i.e. megohm-meters
• CPC Class Codes: G01R 31/007 using microprocessors or computers
• CPC Class Codes: G01R 31/364 Battery terminal connectors with integrated measuring arrangements
• CPC Class Codes: G01R 31/52 Testing for short-circuits, leakage current or ground faults
• CPC Class Codes: H01M 10/0525 Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
• CPC Class Codes: H01M 10/06 Lead-acid accumulators semi-lead accumulators H01M10/20
• CPC Class Codes: H01M 10/4207 for several batteries or cells simultaneously or sequentially
• CPC Class Codes: H01M 10/48 Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte constructional details of current conducting connections for detecting conditions inside cells or batteries, e.g. details of voltage sensing terminals, H01M50/569
• CPC Class Codes: H01M 50/569 Constructional details of current conducting connections for detecting conditions inside cells or batteries, e.g. details of voltage sensing terminals battery terminal connectors with integrated measuring arrangements G01R31/364

Abstract

An energy storage system may include battery packs, such that one terminal of the battery packs is electrically coupled to a resistor representative of an isolation resistance of the battery system. The system may include a semiconductor relay switch, a plurality of resistors configured to electrically couple to the battery packs via the semiconductor relay switch, a gain field-effect transistor (FET) configured to electrically short at least one resistor of the plurality of resistors, and a control system. The control system may send a first command to the semiconductor switch to close, acquire a first voltage waveform, send a second command to the semiconductor switch to open, send a third command to the gain FET to close, send a fourth command to the semiconductor switch to close, acquire a second voltage waveform, and determine the isolation resistance based on the first voltage waveform and the second voltage waveform.

Claims

1. An energy storage system configured to output at least two voltages, comprising:

one or more battery packs, wherein one terminal of the one or more battery packs is electrically coupled to a resistor representative of an isolation resistance of the battery system;

a semiconductor relay switch;

a plurality of resistors configured to electrically couple to the one or more battery packs via the semiconductor relay switch;

a gain field-effect transistor (FET) configured to electrically short at least one resistor of the plurality of resistors; and

a control system configured to;

send a first command to the semiconductor switch to close;

acquire a first voltage waveform;

send a second command to the semiconductor switch to open;

send a third command to the gain FET to close;

send a fourth command to the semiconductor switch to close;

acquire a second voltage waveform; and

determine the isolation resistance based on the first voltage waveform and the second voltage waveform.

2. The energy storage system of claim 1, wherein the one or more battery packs comprise one or more lead acid battery packs or one or more lithium ion battery packs.

3. The energy storage system of claim 1, wherein the semiconductor relay switch comprises light-emitting diode as an input and a metal-oxide-semiconductor field-effect transistor (MOSFET) as an output.

4. The energy storage system of claim 1, wherein the semiconductor relay switch comprises a PhotoMOS switch.

5. The energy storage system of claim 1, wherein the gain FET is configured to electrically couple to ground.

6. The energy storage system of claim 1, wherein the gain FET comprises a 200 volt rating.

7. The energy storage system of claim 1, comprising a first switch configured to electrically couple a first resistor to the one or more battery packs and a second switch configured to electrically couple a second resistor to the one or more battery packs, wherein the first resistor and the second resistor represents the isolation resistance of the battery system.

8. The energy storage system of claim 1, comprising one or more capacitors electrically couples to a system ground of a vehicle and the one or more battery packs.

9. A non-transitory computer-readable medium comprising computer-executable instructions configured to cause a processor to:

acquire a first voltage waveform when a plurality of resistors is electrically coupled to one or more battery packs via a semiconductor relay switch;

acquire a second voltage waveform when at least one resistor of the plurality of resistors is electrically shorted via a gain field-effect transistor (FET); and

determine an isolation resistance between a battery system and a chassis based on the first voltage waveform and the second voltage waveform.

10. The non-transitory computer-readable medium of claim 9, wherein the processor is configured to acquire the first voltage waveform when the gain FET is open.

11. The non-transitory computer-readable medium of claim 9, wherein the processor is configured to acquire the second voltage waveform when the gain FET is closed.

12. The non-transitory computer-readable medium of claim 9, wherein the first voltage waveform corresponds a resistor-capacitance (RC) decay waveform.

13. The non-transitory computer-readable medium of claim 9, wherein the processor is configured to determine the isolation resistance based on a first set of voltage measurements associated with the first voltage waveform and a second set of voltage measurements associated with the second voltage waveform.

14. The non-transitory computer-readable medium of claim 13, wherein the first set of voltage measurements and the second set of voltage measurements each comprise at least four measurements.

15. The non-transitory computer-readable medium of claim 13, wherein each pair of adjacent voltage measurements of the first set of voltage measurements and the second set of voltage measurements comprise an equal amount of time between each other.

16. The non-transitory computer-readable medium of claim 9, wherein the isolation resistance comprises a Thevenin equivalent resistance between the battery system and the chassis.

17. An isolation measurement circuit for measuring isolation resistance, comprising:

a semiconductor relay switch;

a plurality of resistors configured to electrically couple to one or more battery packs via the semiconductor relay switch, wherein one terminal of the one or more battery packs is electrically coupled to a resistor representative of an isolation resistance between a battery system and a chassis;

a gain field-effect transistor (FET) configured to electrically short at least one resistor of the plurality of resistors;

one or more capacitors electrically couples to a system ground of a vehicle and the one or more battery packs; and

a control system configured to;

acquire a first voltage waveform when the plurality of resistors is electrically coupled to the one or more battery packs via the semiconductor relay switch;

acquire a second voltage waveform when the at least one resistor of the plurality of resistors is electrically shorted via the gain field-effect transistor (FET); and

determine the isolation resistance between the battery system and the chassis based on the first voltage waveform and the second voltage waveform.

18. The isolation measurement circuit of claim 17, wherein the semiconductor relay switch comprises light-emitting diode as an input and a metal-oxide-semiconductor field-effect transistor (MOSFET) as an output.

19. The isolation measurement circuit of claim 17, wherein the semiconductor relay switch comprises a PhotoMOS switch.

20. The isolation measurement circuit of claim 17, wherein the gain FET comprises a 200 voltage amplifier device.

21. The isolation measurement circuit of claim 17, wherein the first voltage waveform corresponds a resistor-capacitance (RC) decay waveform.

22. The isolation measurement circuit of claim 21, wherein the control system is configured to determine the isolation resistance based on a first set of voltage measurements associated with the first voltage waveform and a second set of voltage measurements associated with the second voltage waveform.