SEMICONDUCTOR DEVICE
First Claim
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1. A semiconductor device, comprising:
- a semiconductor substrate;
a protruding portion which is a portion of the semiconductor substrate, protrudes from an upper surface of the semiconductor substrate, and extends in a first direction along the upper surface of the semiconductor substrate;
a first gate electrode formed over an upper surface of the protruding portion via a first insulating film and extending in a second direction orthogonal to the first direction;
a second gate electrode formed over the upper surface of the protruding portion and a side surface of the protruding portion via a second insulating film including a charge accumulation portion, adjacent to one of side surfaces of the first gate electrode via the second insulating film, and extending in the second direction; and
an n type source region and an n type drain region formed in the upper surface of the protruding portion so as to sandwich, in the first direction, the protruding portion immediately below a pattern having the first gate electrode and the second gate electrode,wherein the first gate electrode, the second gate electrode, the source region, and the drain region configure a nonvolatile memory element and the second gate electrode contiguous to the second insulating film that covers the upper surface of the protruding portion has an n type impurity concentration lower than an n type impurity concentration of the second gate electrode contiguous to the second insulating film that covers the side surface of the protruding portion.
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Accused Products
Abstract
To provide a semiconductor device having improved reliability by preventing, in a split-gate MONOS memory comprised of a fin type transistor, unbalanced injection distribution of electrons into a charge accumulation film due to the shape of the fin. A memory gate electrode configuring a memory cell is formed over a fin. The impurity concentration of a portion of this memory gate electrode contiguous to an ONO film that covers the upper surface of the fin is made lower than that of a portion of the memory gate electrode contiguous to an ONO film that covers the side surface of the fin.
8 Citations
15 Claims
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1. A semiconductor device, comprising:
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a semiconductor substrate; a protruding portion which is a portion of the semiconductor substrate, protrudes from an upper surface of the semiconductor substrate, and extends in a first direction along the upper surface of the semiconductor substrate; a first gate electrode formed over an upper surface of the protruding portion via a first insulating film and extending in a second direction orthogonal to the first direction; a second gate electrode formed over the upper surface of the protruding portion and a side surface of the protruding portion via a second insulating film including a charge accumulation portion, adjacent to one of side surfaces of the first gate electrode via the second insulating film, and extending in the second direction; and an n type source region and an n type drain region formed in the upper surface of the protruding portion so as to sandwich, in the first direction, the protruding portion immediately below a pattern having the first gate electrode and the second gate electrode, wherein the first gate electrode, the second gate electrode, the source region, and the drain region configure a nonvolatile memory element and the second gate electrode contiguous to the second insulating film that covers the upper surface of the protruding portion has an n type impurity concentration lower than an n type impurity concentration of the second gate electrode contiguous to the second insulating film that covers the side surface of the protruding portion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A semiconductor device, comprising:
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a semiconductor substrate; a protruding portion which is a portion of the semiconductor substrate, protrudes from an upper surface of the semiconductor substrate, and extends in a first direction along the upper surface of the semiconductor substrate; a first gate electrode formed over an upper surface of the protruding portion via a first insulating film and extending in a second direction orthogonal to the first direction; a second gate electrode formed over the upper surface of the protruding portion and a side surface of the protruding portion via a second insulating film including a charge accumulation portion, adjacent to one of side surfaces of the first gate electrode via the second insulating film, and extending in the second direction; and an n type source region and an n type drain region formed in the upper surface of the protruding portion so as to sandwich, in the first direction, the protruding portion immediately below a pattern having the first gate electrode and the second gate electrode, wherein the first gate electrode, the second gate electrode, the source region, and the drain region configure a nonvolatile memory element, and wherein the source region adjacent to the second gate electrode in plan view comprises; an n type first semiconductor region; and an n type second semiconductor region having an n type impurity concentration lower than an n type impurity concentration of the first semiconductor region, located closer to the protruding portion immediately below the second gate electrode than the first semiconductor region is, and formed over the upper surface and the side surface of the protruding portion, and further comprises; an n type third semiconductor region having an n type impurity concentration lower than an n type impurity concentration of the second semiconductor region, located closer to the upper surface of the protruding portion immediately below the second gate electrode than the second semiconductor region is, and formed in the upper surface of the protruding portion. - View Dependent Claims (13, 14, 15)
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Specification