SYNTHETIC TEST CIRCUIT FOR TESTING SUBMODULE PERFORMANCE IN POWER COMPENSATOR AND TEST METHOD THEREOF

• US 20180136281A1
• Filed: 08/22/2017
• Published: 05/17/2018
• Est. Priority Date: 11/11/2016
• Status: Active Grant

• Current Assignee: Pukyong National University (Government of The Republic of Korea), LSIS Co. Ltd. (LS Corporation)
• Original Assignee: Pukyong National University (Government of The Republic of Korea), LSIS Co. Ltd. (LS Corporation)
• Inventors: CHUNG, Yong Ho, BAEK, Seung Taek, KIM, Young Woo, LEE, Jin Hee, NHO, Eui Cheol, JUNG, Jae Hun
• Granted Patent: US 10,436,844 B2
• Time in Patent Office: Days
• CPC Class Codes: G01R 31/3272 Apparatus, systems or circuits therefor G01R31/3275 takes precedence
• CPC Class Codes: G01R 31/3336 Synthetic testing, i.e. with separate current and voltage generators simulating distance fault conditions
• CPC Class Codes: G01R 31/42 AC power supplies
• CPC Class Codes: H02J 3/18 Arrangements for adjusting, eliminating or compensating reactive power in networks for adjustment of voltage H02J3/16
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H02M 7/4835 comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage

Abstract

A synthetic test circuit for testing a submodule performance in a power compensator includes a submodule test unit which is an object of testing the submodule performance, a current source and a controller. The current source is connected to the submodule test unit to supply a voltage to the submodule test unit such that a charging voltage having a capacity set in the submodule test unit is stored in order to operate the submodule test unit. The controller is configured to perform control to perform a submodule performance test of the submodule test unit using the stored charging voltage.

Claims

1. A synthetic test circuit for testing a submodule performance in a power compensator, comprising:

a submodule test unit which is an object of testing to the submodule performance;

a current source connected to the submodule test unit to supply a voltage to the submodule test unit such that a charging voltage having a capacity set in the submodule test unit is stored in order to operate the submodule test unit; and

a controller configured to control to test the submodule performance of the submodule test unit using the stored charging voltage.

2. The synthetic test circuit according to claim 1, further comprising:

a test current adjuster connected between the current source and the submodule test unit to adjust test current.

3. The synthetic test circuit according to claim 2, wherein the test current adjuster includes:

a first inductor connected between the current source and the submodule test unit;

a second inductor connected to the first inductor in series; and

a switch connected to the second inductor in parallel.

4. The synthetic test circuit according to claim 3,

wherein, when the switch is opened, the submodule performance test of a rated voltage is performed, and

wherein, when the switch is closed, the submodule performance test of a low voltage is performed.

5. The synthetic test circuit according to claim 1,

wherein the submodule test unit includes at least one or more submodules connected to each other in series, each of the submodules includes:

a switching unit including first to fourth switches controlled by the controller and first to fourth diodes respectively connected to the first to fourth switches in antiparallel; and

a capacitor connected to the switching unit.

6. The synthetic test circuit according to claim 5,

wherein the switching unit includes:

a first switch pair connected between first and fourth nodes; and

a second switch pair connected to the first switch pair in parallel between the first and fourth nodes,

wherein the first switch pair includes;

the first switch connected between the first node and a second node; and

the second switch connected between the second node and the fourth node,

wherein the second switch pair includes;

the third switch connected between the first node and a third node; and

the fourth switch connected between the third node and the fourth node, and

wherein the capacitor is connected between the first node and the fourth node.

7. The synthetic test circuit according to claim 6, wherein the submodule test unit stores the voltage supplied by the current source in the capacitor as the charging voltage before the test of the submodule performance.

8. The synthetic test circuit according to claim 7, wherein the controller controls switching of the first to fourth switches to generate test current using the charging voltage stored in the capacitor, during the test of the submodule performance.

9. The synthetic test circuit according to claim 8, wherein the controller controls switching of the first to fourth switches such that the test current has an alternating current (AC) waveform.

10. The synthetic test circuit according to claim 8, wherein, to flow in a negative (−

) direction, the test current decreases when the first and fourth switches are turned on and the test current increases when the second or third switch is turned on.

11. The synthetic test circuit according to claim 10, wherein, to flow in a negative (−

) direction, the test current is maintained when only the fourth switch is turned on.

12. The synthetic test circuit according to claim 8, wherein, to flow in a positive (+) direction, the test current increases when the second or third switch is turned on and the test current decreases when the first or fourth switch is turned on.

13. The synthetic test circuit according to claim 12, wherein, to flow in a positive (+) direction, the test current is maintained when only the third switch is turned on.

14. The synthetic test circuit according to claim 1, wherein the current source includes:

a rectifier configured to rectify a three-phase AC voltage to a DC voltage;

a ripple remover configured to remove ripple included in the DC voltage; and

a loss compensator configured to supply a loss compensation component for compensating for loss which occurs in the test current during the test of the submodule performance.

15. The synthetic test circuit according to claim 14, wherein the loss compensator is an inverter.

16. The synthetic test circuit according to claim 14, wherein average output power of the current source is expressed by the following equation:

<

P_INV>

=1/T×

∫

^Ts(i_test(t)×

V_INV(t))dt

where, Ts denotes an integral period in which the loss compensation component is provided, i_test denotes test current and an output voltage V_INV denotes the loss compensator component of the loss compensator.

17. The synthetic test circuit according to claim 16, wherein the integral period is (T/2−

Ts) to T/2 or (T−

Ts) to T (T being a period of the test current).

18. A test method of a synthetic test circuit for testing a submodule performance in a power compensator including a submodule test unit which is an object of testing the submodule performance, a current source connected to the submodule test unit and a controller, the test method comprising:

supplying a voltage to the submodule test unit such that a charging voltage having a capacity set in the submodule test unit is stored in order to operate the submodule test unit;

operating the submodule test unit using the stored charging voltage;

generating test current based on the stored charging voltage upon operation of the submodule test unit; and

testing the submodule performance using the test current.

19. The test method according to claim 18,

wherein the synthetic test circuit for testing the submodule performance in the power compensator further includes a test current adjuster connected between the current source and the submodule test unit,

wherein the test current adjuster includes:

a first inductor connected between the current source and the submodule test unit;

a second inductor connected to the first inductor in series; and

a switch connected to the second inductor in parallel,

wherein the test method further comprises;

opening the switch to perform the submodule performance test of a rated voltage; and

closing the switch to perform the submodule performance test of a low voltage.

20. The test method according to claim 18, further comprising:

generating a loss compensation component for compensating for loss in the current source if loss occurs in the test current during the test of the submodule performance of the submodule test unit,

wherein the loss compensation component is an output voltage output from the current source during a predetermined portion of a half period of the test current.