PROGRAM EXECUTION DEVICE, PROGRAM EXECUTION SYSTEM, AND PROGRAM EXECUTION METHOD

• US 20180150366A1
• Filed: 07/30/2015
• Published: 05/31/2018
• Est. Priority Date: 07/30/2015
• Status: Active Grant

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: NISHIKAWA, Koji, UENO, Takahiro, HASHIMOTO, Shigeru
• Granted Patent: US 10,579,489 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 11/2023 Failover techniques
• CPC Class Codes: G06F 11/203 using migration
• CPC Class Codes: G06F 11/2035 without idle spare hardware
• CPC Class Codes: G06F 11/2046 where the redundant components share persistent storage G06F11/2043 takes precedence
• CPC Class Codes: G06F 2201/85 Active fault masking without idle spares active fault masking without idle spare hardware where processing functionality is redundant G06F11/2035

Abstract

In a program execution device (100X), a memory (110) stores first information (101X) specifying one or more programs, and second information (102X) specifying some programs including at least one of programs to be executed by an other program execution device (100Y), out of the programs specified by the first information (101X) and the programs to be executed by the other program execution device (100Y). When an error in the other program execution device (100Y) is not detected by an error processing unit (123), an instruction processing unit (120) executes the programs specified by the first information (101X). When the error in the other program execution device (100Y) is detected by the error processing unit (123), the instruction processing unit (120) executes the programs specified by the second information (102X).

Claims

1. A program execution device that takes over execution of at least one program from an other program execution device upon occurrence of an error in the other program execution device, the program execution device comprising:

a memory to store first information specifying one or more programs, and second information specifying some programs including at least one of programs to be executed by the other program execution device, out of the programs specified by the first information and the programs to be executed by the other program execution device; and

an instruction processing unit including an error processing unit to detect the error, the instruction processing unit being configured to execute the programs specified by the first information stored in the memory when the error is not detected by the error processing unit and execute the programs specified by the second information stored in the memory when the error is detected by the error processing unit.

2. The program execution device according to claim 1, wherein

the other program execution device executes a plurality of programs, and

the memory stores, as the first information, information specifying two or more programs, and, as the second information, information specifying some programs out of the programs specified by the first information and some programs out of the programs to be executed by the other program execution device.

3. The program execution device according to claim 1, wherein

the memory further stores, as additional information of the second information, for each program specified by the second information, information indicating whether or not accuracy of processing in the program is permitted to be lowered, and

when executing a program specified by the second information, the instruction processing unit refers to the additional information of the second information to determine whether or not to lower the accuracy of processing in the program.

4. The program execution device according to claim 1, wherein

the memory further stores third information associated with the first information and specifying a period in which the programs specified by the first information are to be executed, and fourth information associated with the second information and specifying a period in which the programs specified by the second information are to be executed, and

when the error is not detected by the error processing unit, the instruction processing unit executes the programs specified by the first information in the period specified by the third information stored in the memory, and when the error is detected by the error processing unit, the instruction processing unit executes the programs specified by the second information in the period specified by the fourth information stored in the memory.

5. The program execution device according to claim 4, wherein the memory stores, as the fourth information, information specifying a period longer than the period specified by the third information.

6. The program execution device according to claim 1, wherein

the instruction processing unit is implemented by a CPU, and

the memory is a local memory used exclusively by the CPU.

7. A program execution system comprising:

a plurality of program execution devices, each being the program execution device according to claim 1, and taking over at least one program from any one of the plurality of program execution devices upon occurrence of an error in that program execution device.

8. A program execution method comprising:

when an error is not detected, reading first information specifying one or more programs from a memory, and executing the programs specified by the read first information, by a program execution device that takes over execution of at least one program from an other program execution device upon occurrence of the error in the other program execution device; and

when the error is detected, reading second information specifying some programs including at least one of programs to be executed by the other program execution device, out of the programs specified by the first information and the programs to be executed by the other program execution device, from the memory, and executing the programs specified by the read second information, by the program execution device.