Methods and Devices to Improve Switching Time by Bypassing Gate Resistor

  • US 20180167062A1
  • Filed: 12/12/2016
  • Published: 06/14/2018
  • Est. Priority Date: 12/12/2016
  • Status: Active Grant
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First Claim
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1. A switching circuit comprising:

  • a first node;

    a second node;

    a main FET switch;

    a gate resistor;

    a bypass switch, andwherein;

    a drain of the main FET switch is connected to the first node and a source of the main FET switch is coupled to the second node;

    the bypass switch is coupled across the gate resistor; and

    the gate resistor couples a control voltage to a gate of the main switch.

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