Configurable Computing Array Package Based on Printed Memory

• US 20180198449A1
• Filed: 03/09/2018
• Published: 07/12/2018
• Est. Priority Date: 03/05/2016
• Status: Active Grant

• Current Assignee: Hangzhou Haicun Information Technology Co., Ltd.
• Original Assignee: Hangzhou Haicun Information Technology Co., Ltd.
• Inventors: ZHANG, Guobiao
• Granted Patent: US 10,305,486 B2
• Time in Patent Office: Days
• CPC Class Codes: G11C 17/10 in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
• CPC Class Codes: G11C 5/02 Disposition of storage elements, e.g. in the form of a matrix array
• CPC Class Codes: H03K 19/17728 Reconfigurable logic blocks, e.g. lookup tables
• CPC Class Codes: H03K 19/1776 for memories

Abstract

The present invention discloses a new type of configurable gate array—a configurable computing array package. It comprises at least a configurable computing die and a configurable logic die. The configurable computing die comprises at least one configurable computing element. The configurable computing element can selectively realize a basic function from a math library. It comprises a plurality of printed arrays for storing the look-up tables (LUT) for different basic functions. The configurable computing die and the configurable logic die are located in a same package.

Claims

1. A configurable computing package, comprising:

a configurable computing die comprising at least a configurable computing element, said configurable computing element comprising;

a first printed array for storing a first look-up table (LUT) of a first basic function;

a second printed array for storing a second LUT of a second basic function;

a plurality of internal configurable interconnects coupling said first and second printed arrays;

wherein said configurable computing element selectively realizes said first or second basic function by programming said internal configurable interconnects;

a configurable logic die comprising a configurable logic element, wherein said configurable logic element selectively realizes a logic function from a logic library;

a plurality of inter-die connections for coupling said configurable computing die and said configurable logic die;

wherein said configurable computing array package realizes a complex math function by programming said configurable computing element and said configurable logic element.

2. The configurable computing array package according to claim 1, wherein said first and second printed arrays are placed side-by-side.

3. The configurable computing array package according to claim 1, wherein said second printed array is stacked above said first printed array.

4. The configurable computing array package according to claim 3, wherein said second printed array at least partially covers said first printed array.

5. The configurable computing array package according to claim 1, wherein said first and second LUTs are respectively recorded into said first and second printed arrays using a printing method during manufacturing.

6. The configurable computing array package according to claim 5, wherein said printing method is photo-lithography, nano-imprint, e-beam lithography, DUV lithography, or laser-programming.

7. The configurable computing array package according to claim 1, wherein said configurable computing die and said configurable logic die are vertically stacked.

8. The configurable computing array package according to claim 1, further comprising more than one configurable computing dice.

9. A configurable computing array, comprising:

a configurable computing die comprising at least a configurable computing element, said configurable computing element comprising;

a first printed array for storing a first look-up table (LUT) of a first basic function;

a second printed array for storing a second LUT of a second basic function;

a plurality of internal configurable interconnects coupling said first and second printed arrays;

wherein said configurable computing element selectively realizes said first or second basic function by programming said internal configurable interconnects;

a configurable logic die comprising a configurable logic element, wherein said configurable logic element selectively realizes a logic function from a logic library;

a plurality of inter-die connections for coupling said configurable computing die and said configurable logic die;

at least a configurable interconnect for selectively realizing an interconnect from an interconnect library;

wherein said configurable computing array realizes a complex math function by programming said configurable computing element, said configurable logic element and said configurable interconnect.

10. The configurable computing array package according to claim 9, wherein said first and second printed arrays are placed side-by-side.

11. The configurable computing array package according to claim 9, wherein said second printed array is stacked above said first printed array.

12. The configurable computing array package according to claim 11, wherein said second printed array at least partially covers said first printed array.

13. The configurable computing array package according to claim 9, wherein said first printed array is stacked above said internal configurable interconnects.

14. The configurable computing array package according to claim 9, wherein said second printed array is stacked above said internal configurable interconnects.

15. The configurable computing array package according to claim 9, wherein said configurable interconnect is formed on said configurable computing die.

16. The configurable computing array package according to claim 9, wherein said configurable interconnect is formed on said configurable logic die.

17. The configurable computing array package according to claim 9, wherein said first and second LUTs are respectively recorded into said first and second printed arrays using a printing method during manufacturing.

18. The configurable computing array package according to claim 17, wherein said printing method is photo-lithography, nano-imprint, e-beam lithography, DUV lithography, or laser-programming.

19. The configurable computing array package according to claim 9, wherein said configurable computing die and said configurable logic die are vertically stacked.

20. The configurable computing array package according to claim 9, further comprising more than one configurable computing dice.