SOLID-STATE IMAGING DEVICE, METHOD OF DRIVING THE SAME, AND ELECTRONIC APPARATUS

• US 20180227517A1
• Filed: 04/02/2018
• Published: 08/09/2018
• Est. Priority Date: 03/14/2014
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Semiconductor Solutions Corporation (Sony Group Corp.)
• Inventors: KOGA, Fumihiko
• Granted Patent: US 10,237,500 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/14647 Multicolour imagers having a stacked pixel-element structure, e.g. npn, npnpn or MQW elements
• CPC Class Codes: H01L 27/14665 Imagers using a photoconductor layer
• CPC Class Codes: H04N 23/10 for generating image signals from different wavelengths
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements
• CPC Class Codes: H04N 25/616 involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
• CPC Class Codes: H04N 25/65 applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response
• CPC Class Codes: H04N 25/68 applied to defects
• CPC Class Codes: H04N 25/70 SSIS architectures; Circuits associated therewith
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 25/772 comprising A/D, V/T, V/F, I/T or I/F converters
• CPC Class Codes: H04N 25/778 comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
• CPC Class Codes: H10K 39/32 Organic image sensors

Abstract

The present technology relates to a solid-state imaging device that can improve imaging quality by reducing variation in the voltage of a charge retention unit, a method of driving the solid-state imaging device, and an electronic apparatus.

A first photoelectric conversion unit generates and accumulates signal charge by receiving light that has entered a pixel, and photoelectrically converting the light. A first charge retention unit retains the generated signal charge. A first output transistor outputs the signal charge in the first charge retention unit as a pixel signal, when the pixel is selected by the first select transistor. A first voltage control transistor controls the voltage of the output end of the first output transistor. The present technology can be applied to pixels in solid-state imaging devices, for example.

Claims

1-20. -20. (canceled)

21. An imaging device, comprising:

a pixel including;

a first photoelectric conversion unit configured to convert incident light into electric charge;

a first floating diffusion configured to retain the electric charge generated by the first photoelectric conversion unit;

a first select transistor configured to control selecting of the pixel;

a first output transistor configured to output the electric charge in the first floating diffusion as a pixel signal when the pixel is selected by the first select transistor; and

a first voltage control transistor configured to control a voltage at an output end of the first output transistor,

wherein the first voltage control transistor is coupled between a first node and a second node, the first node being between the first output transistor and the first select transistor, the second node being configured to receive a power supply voltage.

22. The imaging device according to claim 21, wherein:

the first photoelectric conversion unit photoelectrically converts light of a first wavelength; and

the pixel further includes;

a second photoelectric conversion unit configured to generate electric charge by receiving light of a second wavelength and photoelectrically converting the light, the second wavelength being different from the first wavelength;

a third photoelectric conversion unit configured to generate electric charge by receiving light of a third wavelength and photoelectrically converting the light, the third wavelength being different from the first wavelength and the second wavelength;

a second floating diffusion configured to retain the electric charge generated by the second and third photoelectric conversion units;

a second select transistor configured to control selecting of the pixel; and

a second output transistor configured to output the electric charge in the second floating diffusion as a pixel signal when the pixel is selected by the second select transistor.

23. The imaging device according to claim 22, wherein the pixel further includes

a second voltage control transistor configured to control a voltage at an output end of the second output transistor.

24. The imaging device according to claim 21, wherein the first photoelectric conversion unit is formed with a structure having a photoelectric conversion film interposed between upper and lower electrodes, wherein the first output transistor and the first voltage control transistor have a same channel type.

25. The imaging device according to claim 21, wherein the first photoelectric conversion unit is formed with a photodiode formed by a PN junction in a semiconductor substrate.

26. The imaging device according to claim 21, wherein the electric charge generated by the first photoelectric conversion unit is holes.

27. The imaging device according to claim 21, wherein the electric charge generated by the first photoelectric conversion unit is electrons.

28. The imaging device according to claim 21, wherein:

the first floating diffusion includes a diffusion layer of a second conductivity type, the diffusion layer being formed in a semiconductor substrate of a first conductivity type; and

a reset voltage for resetting a voltage of the first floating diffusion is a voltage equal to a potential of the first conductivity type.

29. The imaging device according to claim 28, wherein the first conductivity type is the p-type, and the second conductivity type is the n-type.

30. The imaging device according to claim 21, further comprising

a transfer transistor configured to transfer the electric charge generated by the first photoelectric conversion unit to the first floating diffusion.

31. The imaging device according to claim 21, wherein a drain voltage of the first voltage control transistor is equal to a drain voltage of the output transistor.

32. The imaging device according to claim 21, wherein the first voltage control transistor is a deep-depletion transistor.

33. The imaging device according to claim 21, further comprising:

a drive circuit configured to apply a negative bias as an off-state voltage of the first voltage control transistor.

34. The imaging device according to claim 21, further comprising:

a drive circuit configured to control the first voltage control transistor to be invariably in an off-state while the first select transistor is in an on-state.

35. The imaging device according to claim 21, further comprising:

a drive circuit configured to switch off the first voltage control before the first select transistor is switched on.

36. The imaging device according to claim 21, further comprising:

a drive circuit configured to reset the first floating diffusion while the first select transistor is in an on-state and the first voltage control transistor is in an off-state before signal accumulation is performed by the first photoelectric conversion unit while the drive circuit controls the first select transistor to be in an off-state and the first voltage control transistor to be in an on-state.

37. The imaging device according to claim 21, further comprising:

a drive circuit configured to reset the first floating diffusion while the first select transistor is in an off-state and the first voltage control transistor is in an on-state, and readout a signal at the time of the reset while the drive circuit controls the first select transistor to be in an on-state and the first voltage control transistor to be in an off-state.

38. A method of driving an imaging device including a pixel, the pixel including a first photoelectric conversion unit, a first floating diffusion, a first select transistor, a first output transistor, and a first voltage control transistor, the method comprising:

generating and accumulating, by the first photoelectric conversion unit, electric charge based on incident light;

retaining, by the first floating diffusion, the electric charge generated by the first photoelectric conversion unit;

controlling, by the first select transistor, selection of the pixel according to a first selection signal;

outputting, by the first output transistor, the electric charge in the first floating diffusion as a pixel signal when the pixel is selected by the first select transistor; and

controlling, by the first voltage control transistor, a voltage at an output end of the first output transistor according to a second selection signal; and

applying, by a drive circuit, the first selection signal and the second selection signal to the first select transistor and the first voltage control transistor, respectively, to turn on the first select transistor and turn off the first voltage control transistor during a reset operation and a readout operation, and to turn on the first voltage control transistor and turn off the first select transistor during the accumulating the electric charge.

39. An electronic apparatus comprising:

an imaging device including a pixel,

the pixel including;

a first photoelectric conversion unit configured to convert incident light into electric charge;

a first floating diffusion configured to retain the electric charge generated by the first photoelectric conversion unit;

a first select transistor configured to control selecting of the pixel;

a first output transistor configured to output the electric charge in the first floating diffusion as a pixel signal when the pixel is selected by the first select transistor; and

a first voltage control transistor configured to control a voltage at an output end of the first output transistor,

wherein the first voltage control transistor is coupled between a first node and a second node, the first node being between the first output transistor and the first select transistor, the second node being configured to receive a power supply voltage.

40. The electronic apparatus according to claim 39, wherein the first voltage control transistor and the first output transistor have a same channel type.