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LIFT OFF PROCESS FOR CHIP SCALE PACKAGE SOLID STATE DEVICES ON ENGINEERED SUBSTRATE

  • US 20180261488A1
  • Filed: 05/08/2018
  • Published: 09/13/2018
  • Est. Priority Date: 10/19/2015
  • Status: Active Grant
First Claim
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1. A method of processing an engineered substrate structure, the method comprising:

  • providing an engineered substrate structure including;

    a polycrystalline substrate; and

    an engineered layer encapsulating the polycrystalline substrate;

    forming a sacrificial layer coupled to the engineered layer;

    joining a solid state device structure to the sacrificial layer;

    forming a molding support on the solid state device structure;

    forming one or more channels in the solid state device structure and the molding support by removing one or more portions of the solid state device structure and one or more corresponding portions of the molding support to expose one or more portions of the sacrificial layer;

    flowing an etching chemical through the one or more channels to the one or more exposed portions of the sacrificial layer; and

    dissolving the sacrificial layer by interaction between the etching chemical and the sacrificial layer, thereby separating the engineered substrate structure from the solid state device structure.

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