DEVICES AND METHODS FOR SELECTIVE DISPLAY FRAME FETCH

• US 20190045089A1
• Filed: 04/02/2018
• Published: 02/07/2019
• Est. Priority Date: 04/02/2018
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Tanner, Jason, Diefenbaugh, Paul, Sinha, Vishal, Runyan, Arthur, Smith, Gary K., Bui, Kathy, Li, Yifan, Huang Meterelliyoz, Shirley
• Granted Patent: US 10,516,812 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 3/1415 with means for detecting differences between the image stored in the host and the images displayed on the displays
• CPC Class Codes: G06T 1/60 Memory management
• CPC Class Codes: G09G 2310/0237 Switching ON and OFF the backlight within one frame
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 2320/062 Adjustment of illumination source parameters
• CPC Class Codes: G09G 2320/066 for control of contrast
• CPC Class Codes: G09G 2360/16 Calculation or use of calculated indices related to luminance levels in display data
• CPC Class Codes: G09G 5/001 Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
• CPC Class Codes: G09G 5/363 Graphics controllers
• CPC Class Codes: G09G 5/393 Arrangements for updating the contents of the bit-mapped memory
• CPC Class Codes: G09G 5/397 Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay G09G5/02 takes precedence
• CPC Class Codes: G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
• CPC Class Codes: H04N 5/0736 using digital storage buffer techniques

Abstract

Techniques for selective display frame fetching can include receiving or fetching rendered display frames by a display engine. The display engine can determine if a new frame includes one or more dirty portions. If the new frame includes one or more dirty portions, just the dirty portions can be loaded by the display engine into a display buffer. The display engine can also scan out just the dirty portions from the display buffer to a display.

Claims

1. A processing unit comprising:

a display buffer; and

a display engine configured to;

receive an indication of a new frame from a rendering engine or an operating system;

determine if the indication of a new frame includes an indication of a flip event;

determine one or more dirty regions of the new frame based on the flip event;

fill the display buffer with the one or more dirty regions of the new frame; and

scan out the one or more dirty regions of the new frame from the display buffer to a display port.

2. The processing unit of claim 1, wherein the display engine is further configured to disable an adaptive contrast and backlight enhancement if a gamma curve is in a linear mode when a flip completion event indication is determined.

3. The processing unit of claim 2, wherein the adaptive contrast and backlight enhancement is further disabled if the gamma curve is in the linear mode before a timeout period has expired.

4. The processing unit of claim 2, wherein the adaptive contrast and backlight enhancement is further disabled if the gamma curve is in the linear mode when not after a predetermined number of frames.

5. The processing unit of claim 1, wherein the display engine is further configured to:

fill the display buffer with the new frame when the flip completion event indication is not determined; and

scan out the new frame from the display buffer to display port.

6. The processing unit of claim 5, wherein the display engine is further configured to;

fill the display buffer with the new frame further when the indication of the new frame is received after a timeout period has expired.

7. The processing unit of claim 5, wherein the display engine is further configured to;

fill the display buffer with the new frame further when the indication of the new frame is received after a predetermined number of frames.

8. A computing device comprising:

a display; and

a processing unit including a display buffer and a display engine, the display engine configured to;

receive an indication of a new frame from a rendering engine or an operating system;

determine one or more dirty regions of the new frame;

fill the display buffer with the one or more dirty regions of the new frame; and

scan out the one or more dirty regions of the new frame from the display buffer to a display port.

9. The computing device of claim 8, wherein the display engine is configured to receive an indication of the one or more dirty regions.

10. The computing device of claim 8, wherein the display engine is configured to:

produce a flip of multiple planes; and

determine which of the multiple planes includes one or more dirty regions based on which plane has flipped or not flipped.

11. The computing device of any one of claims 8, wherein the new frame, the one or more dirty region of the new frame in the display buffer, and the one or more dirty regions of the new frame scanned out are compressed.

12. The computing device of any one of claims 8, wherein the processing unit comprises a central processing unit.

13. The computing device of any one of claims 8, wherein the processing unit comprises a graphics processing unit.

14. The computing device of any one of claims 8, wherein the display engine is coupled to the display by the display port.

15. A computing device comprising:

a display; and

a processing unit including a display buffer and a display engine, the display engine configured to;

receive an indication of a new frame from a rendering engine or an operating system;

determine if the indication of a new frame includes an indication of a flip event;

determine one or more dirty regions of the new frame based on the flip event;

fill the display buffer with the one or more dirty regions of the new frame; and

scan out the one or more dirty regions of the new frame from the display buffer to a display port.

16. The computing device of claim 15, wherein the display engine is further configured to disable an adaptive contrast and backlight enhancement if a gamma curve is in a linear mode when a flip completion event indication is determined.

17. The computing device of claim 16, wherein the adaptive contrast and backlight enhancement is further disabled if the gamma curve is in the linear mode when a timeout period has not expired.

18. The computing device of claim 16, wherein the adaptive contrast and backlight enhancement is further disabled if the gamma curve is in the linear mode when not after a predetermined number of frames.

19. The computing device of claim 17, wherein the display engine is further configured to;

fill the display buffer with the new frame when the flip completion event indication is not determined; and

scan out the new frame from the display buffer to display port.

20. The computing device of claim 19, wherein the display engine is further configured to;

fill the display buffer with the new frame further when the indication of the new frame is received after a timeout period has expired.

21. The computing device of claim 19, wherein the display engine is further configured to;

fill the display buffer with the new frame further when the indication of the new frame is received after a predetermined number of frames.

22. The computing device of claim 19, wherein the display engine is further configured to;

determine if the adaptive contrast and backlight enhancement can be enabled when the indication of the new frame is received after a timeout period has expired; and

set the adaptive contrast and backlight enhancement when it is determined that the adaptive contrast and backlight enhancement can be enabled.

23. The computing device of claim 19, wherein the display engine is further configured to;

determine if the adaptive contrast and backlight enhancement can be enabled when the indication of the new frame is received after a predetermined number of frames; and

set the adaptive contrast and backlight enhancement when it is determined that the adaptive contrast and backlight enhancement can be enabled.

24. The computing device of any one of claims 15, wherein the display engine is further configured to apply the adaptive contrast and backlight enhancement based on a histogram of full frame changes.

25. The computing device of any one of claim 15, wherein the display engine is further configured to apply the adaptive contrast and backlight enhancement based on a histogram of partial frame changes.