SEMICONDUCTOR DEVICE INCLUDING A MULTIGATE TRANSISTOR FORMED WITH FIN STRUCTURE

• US 20190157268A1
• Filed: 01/28/2019
• Published: 05/23/2019
• Est. Priority Date: 05/24/2017
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: KIM, Sung Min, Kim, Dong Won, Bae, Geum Jong
• Granted Patent: US 10,453,839 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/3086 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/823431 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 27/0886 including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/6656 using multiple spacer layers, e.g. multiple sidewall spacers

Abstract

A semiconductor device is provided. The semiconductor device includes a substrate, a plurality of fins comprising a first fin, a second fin, a third fin, a fourth fin and a fifth fin, each of the plurality of protruding from the substrate in a first direction, and spaced apart from one another in a second direction that intersects the first direction and a plurality of trenches comprising a first trench, a second trench, a third trench and a fourth trench, each of the plurality of trenches being formed between adjacent fins of the plurality of fins, wherein variation of a first width of the first trench and a third width of the third trench is smaller than a first variation, wherein variation of a second width of the second trench and a fourth width of the fourth trench is smaller than a second variation, and wherein the second variation is greater than the first variation.

Claims

1. A semiconductor device, comprising:

a first fin, a second fin, a third fin, a fourth fin and a fifth fin, wherein each of the first through fifth fins protrude from a substrate in a first direction and space apart from one another in a second direction; and

a first trench, a second trench, a third trench and a fourth trench, wherein the first trench defines the first and second fins, the second trench defines the second and third fins, the third trench defines the third and fourth fins, and the fourth trench defines the fourth and fifth fins,

wherein a first width of the first trench, a second width of the second trench, a third width of the third trench, and a fourth width of the fourth trench are different from each other, and

wherein a first difference between the first width and the third width are different from a second difference between the second width and the fourth width.

2. The semiconductor device of claim 1, wherein the first difference is smaller than the second difference.

3. The semiconductor device of claim 2, wherein the first width and the third width are smaller than the second width and the fourth width.

4. The semiconductor device of claim 1, wherein a third difference between a first depth of the first trench and a third depth of the third trench are different from a fourth difference between a second depth of the second trench and a fourth depth of the fourth trench.

5. The semiconductor device of claim 4, wherein the third difference is smaller than the fourth difference.

6. The semiconductor device of claim 5, wherein the first depth and the third depth are smaller than the second depth and the fourth depth.

7. The semiconductor device of claim 1, wherein a fifth difference between a first sidewall slope of the first trench and a third sidewall slope of the third trench are different from a sixth difference between a second sidewall slope of the second trench and a fourth sidewall slope of the fourth trench.

8. The semiconductor device of claim 7, wherein the fifth difference is smaller than the sixth difference.

9. The semiconductor device of claim 8, wherein the first sidewall slope and the third sidewall slope are greater than the second sidewall slope and the fourth sidewall slope.

10. The semiconductor device of claim 1, further comprising a gate electrode extending on the first through fifth fins in the second direction.

11. The semiconductor device of claim 1, wherein a height of at least one of the second, third, and fifth fins is lower than that of the first fin.

12. A semiconductor device, comprising:

a first fin, a second fin, a third fin, a fourth fin and a fifth fin, wherein each of the first through fifth fins protrude from a substrate in a first direction and space apart from one another in a second direction; and

a first trench, a second trench, a third trench and a fourth trench, wherein the first trench defines the first and second fins, the second trench defines the second and third fins, the third trench defines the third and fourth fins, and the fourth trench defines the fourth and fifth fins,

wherein a first difference between a first depth of the first trench and a third depth of the third trench are different from a second difference between a second depth of the second trench and a fourth depth of the fourth trench.

13. The semiconductor device of claim 12, wherein the first depth and the third depth are smaller than the second depth and the fourth depth, and

the first difference is smaller than the second difference.

14. The semiconductor device of claim 12, wherein a first width of the first trench and a third width of the third trench are determined by a thickness of mask pattern formed by atomic layer deposition process, and

a second width of the second trench and a fourth width of the fourth trench are determined by a length of a photoresist pattern.

15. The semiconductor device of claim 14, wherein a third difference between the first width and the third width are smaller than a fourth difference between the second width and the fourth width.

16. The semiconductor device of claim 12, wherein a fifth difference between a first sidewall slope of the first trench and a third sidewall slope of the third trench are greater than a sixth difference between a second sidewall slope of the second trench and a fourth sidewall slope of the fourth trench.

17. A semiconductor device, comprising:

a first fin structure, a second fin structure, and a third fin structure protruding from a substrate, extending in a first direction, and spaced apart from each other in a second direction, wherein the first fin structure is disposed between the second fin structure and the third fin structure;

a first trench to space the first fin structure and the second fin structure; and

a second trench to space the first fin structure and the third fin structure,

wherein the first fin structure comprises a first base fin protruding from the substrate, a first fin and a second fin protruding from the first base fin and spaced apart from each other in the second direction, and a third trench to define the first fin and the second fin,

wherein a first width of the first trench is smaller than a second width of the second trench, and

a first depth of the first trench is smaller than a second depth of the second trench.

18. The semiconductor device of claim 17, wherein the second fin structure comprises a second base fin protruding from the substrate, a third fin protruding from the second base fin, and a fourth trench to define the third fin.

19. The semiconductor device of claim 18, wherein the second fin structure further comprises a fourth fin protruding from the second base fin,

the fourth trench further defines the fourth fin, and

a height of the fourth fin is smaller than a height of the third fin.

20. The semiconductor device of claim 18, wherein a first difference between the first width of the first trench and the second width of the second trench is greater than a second difference between a third width of the third trench and a fourth width of the fourth trench.