SYSTEM AND METHOD FOR IMAGE DISPLAY INCLUDING DATA STORAGE USING PIXELS

• US 20190311681A1
• Filed: 04/04/2019
• Published: 10/10/2019
• Est. Priority Date: 04/05/2018
• Status: Active Grant

• Current Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Original Assignee: Commissariat a L'Energie Atomique (AES Corporation)
• Inventors: DUPONT, Bertrand
• Granted Patent: US 10,902,792 B2
• Time in Patent Office: Days
• CPC Class Codes: G09G 2300/0828 forming a digital to analog [D/A] conversion circuit
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2350/00 Solving problems of bandwidth in display systems
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/32 semiconductive, e.g. using light-emitting diodes [LED]
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3283 in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements

Abstract

A display device comprising a matrix of pixels each one comprising:

• • a display unit displaying a binary word of the BCM type encoded over N bits, with N a whole number greater than or equal to 2,
  • a storage unit storing at least three bits,
    further comprising a sequencing unit outputting to the storage unit of each pixel, during the display of a first image:
  • a storage signal of at least two bits of the binary word of a second image to be displayed after the first image and/or of the binary word of the first image,
  • a display signal triggering successive sendings of the stored bits to the display unit,
    wherein the storage is triggered during at least one portion of the display of at least one bit of the binary word of the first image.

Claims

1. Image display device comprising at least one matrix of pixels, wherein each pixel comprises at least:

one display unit configured to emit, during the display by the matrix of pixels of an image encoded in the form of several binary words of the BCM type comprising N bits, with N a whole number greater than or equal to 2, at least one light signal for a duration that corresponds to a value encoded in one of the binary words of the image, with each one of the N bits of said one of the binary words of the image representing a duration of the display of the light signal that is proportional to the weight of the bit,

one storage unit configured to store at least three bits, comprising an output coupled with an input of the display unit, and an input configured to receive the binary words of the images to be displayed by said display unit,

the image display device further comprising a sequencing unit configured to output to the storage unit of each pixel, during the display of a first image by the matrix of pixels;

a storage signal that triggers, during the display of one of the bits of one of the binary words of the first image by the display unit of the pixel, a storage of at least two other bits of one of the binary words of a second image intended to be displayed after the first image and/or of said one of the binary words of the first image, in said storage unit of the pixel,

a display signal that triggers the successive sending of each one of the bits of said one of the binary words of the first image stored in the storage unit of the pixel to the display unit of the pixel.

2. The image display device according to claim 1, wherein the sequencing unit is configured to trigger the storage during the display of the most significant bit of said one of the binary words of the first image.

3. The image display device according to claim 1, wherein the storage unit of each pixel comprises at least three flip-flops coupled in series to one another and such that an input from a first of the flip-flops is coupled to an input of the pixel intended to receive the binary words, and such that an output from a last of the flip-flops is coupled to an input of the display unit.

4. The image display device according to claim 3, wherein:

the storage unit of each pixel further comprises at least one multiplexer comprising at least;

a) two data inputs of which one is coupled to a first output of the sequencing unit on which the display signal is intended to be sent and of which the other is coupled to a second output of the sequencing unit on which the storage signal is intended to be sent,

b) one output coupled to a control input of each one of at least two first flip-flops of the storage unit corresponding to those, among the flip-flops of the storage unit, in which said at least two other bits of one of the binary words of the second image and/or of said one of the binary words of the first image are intended to be stored during said display of one of the bits of one of the binary words of the first image,

c) one control input coupled to a third output of the sequencing unit on which a selection signal is intended to be sent, making it possible to couple the output of the multiplexer to one or the other of the two data inputs of the multiplexer according to the value of the selection signal,

one control input of the last of the flip-flops of the storage unit of each pixel is coupled to the first output of the sequencing unit,

the sequencing unit is configured such that, for each pixel, the selection signal controls the multiplexer such that during said display of one of the bits of one of the binary words of the first image, the storage signal is outputted on the output of the multiplexer and triggers the storage of said at least two other bits of one of the binary words of the second image and/or of said one of the binary words of the first image, and for the display of the other stored bits, the display signal is outputted on the output of the multiplexer and triggers the successive displays of each one of the other stored bits.

5. The image display device according to claim 3, wherein:

the sequencing unit outputs over a single output the display signal and the storage signal in the form of a single and same signal named display and storage signal, said output being coupled to a control input of each one of at least two first flip-flops of the storage unit corresponding to those, among the flip-flops of the storage unit, in which said at least two other bits of one of the binary words of the second image and/or of said one of the binary words of the first image are stored during said display of one of the bits of one of the binary words of the first image,

the storage unit of each pixel further comprises at least one multiplexer comprising two data inputs, of which one is coupled to the output of the sequencing unit on which the display and storage signal is intended to be outputted and of which the other is coupled to a reference electric potential, one control input coupled to a third output of the sequencing unit on which a selection signal is intended to be sent and making it possible to couple the output of the multiplexer to one or the other of the two data inputs of the multiplexer according to the value of the selection signal, and an output coupled to a control input of the last of the flip-flops of the storage unit,

the sequencing unit is configured such that, for each pixel, the selection signal controls the multiplexer such that during said display of one of the bits of one of the binary words of the first image, the reference electric potential is outputted on the output of the multiplexer while the display and storage signal applied on the control input of each one of the first flip-flops of the storage unit triggers the storage of said at least two other bits of one of the binary words of the second image and/or of said one of the binary words of the first image, and for the display of the other stored bits, the display and storage signal is applied on the control inputs of the flip-flops of the storage unit and triggers the successive displays of each one of the other stored bits.

6. The image display device according to claim 3, wherein:

the storage unit of each pixel further comprises at least;

a) one OR gate comprising two inputs coupled to first and second outputs of the sequencing unit on which the display and storage signals are intended to be sent, and of which one output is coupled to a control input of each one of at least two first flip-flops of the storage unit corresponding to those, among the flip-flops of the storage unit, in which said at least two other bits of one of the binary words of the second image and/or of said one of the binary words of the first image are intended to be stored during said display of one of the bits of one of the binary words of the first image,

b) one multiplexer comprising two data inputs of which one is coupled to the output of the OR gate and of which the other is coupled to a reference electric potential, one control input coupled to a third output of the sequencing unit on which a selection signal is intended to be sent and making it possible to couple the output of the multiplexer to one or the other of the two data inputs of the multiplexer according to the value of the selection signal, and an output coupled to a control input of the last of the flip-flops of the storage unit,

the sequencing unit is configured such that, for each pixel, the selection signal controls the multiplexer such that during said display of one of the bits of one of the binary words of the first image, the reference electric potential is outputted on the output of the multiplexer while the storage signal applied on the control input of each one of the first flip-flops of the storage unit triggers the storage of said at least two other bits of one of the binary words of the second image and/or of said one of the binary words of the first image, and for the display of the other stored bits, the signal obtained at the output of the OR gate is applied on the control inputs of the flip-flops of the storage unit and triggers the successive displays of each one of the other stored bits.

7. The image display device according to claim 3, wherein, in each pixel, the output of the last of the first flip-flops of the storage unit of the pixel is coupled to the input of the first of the flip-flops of the storage unit of the pixel through a switch controlled by the sequencing unit which is configured to close the switch when the binary word of the first image is similar to the binary word of the second image.

8. The image display device according to claim 1, wherein:

the storage unit of each pixel comprises;

a) at least two first flip-flops coupled in series to one another and such that a data input of a first of said at least two first flip-flops is coupled to an input of the pixel intended to receive the binary words,

b) at least two second flip-flops coupled in series to one another and such that a data input of a first of said at least two second flip-flops is coupled to said input of the pixel,

c) a switching circuit comprising two data inputs, of which one is coupled to a first output of the sequencing unit on which the display signal is intended to be sent and of which the other is coupled to a second output of the sequencing unit on which the storage signal is intended to be sent, one control input coupled to a third output of the sequencing unit on which a selection signal is intended to be sent, a first output coupled to a control input of each one of the first flip-flops and a second output coupled to a control input of each one of the second flip-flops, and configured such that according to the value of the selection signal, the first output is coupled to the first data input and the second output is coupled to the second data input, or the first output is coupled to the second data input and the second output is coupled to the first data input,

d) one multiplexer comprising two data inputs of which one is coupled to the output of a last of said at least two first flip-flops and of which the other is coupled to the output of a last of said at least two second flip-flops, a control input coupled to the third output of the sequencing unit, and an output coupled to an input of the display unit,

the sequencing unit is configured such that, for each pixel, the selection signal controls the switching circuit and the multiplexer such that during said display of one of the bits of one of the binary words of the first image via the first flip-flops, the storage signal is applied on the control inputs of the second flip-flops and triggers the storage of said at least two other bits of one of the binary words of the second image and/or of said one of the binary words of the first image in the second flip-flops.

9. The image display device according to claim 1, wherein the storage unit of each pixel comprises:

at least three storage elements each comprising an input on which a bit to be stored is intended to be applied and an output on which a stored bit is intended to be outputted,

a first addressing circuit comprising a data input coupled to an input of the pixel intended to receive the binary words of the images to be displayed, at least three outputs each one coupled to an input of one of the storage elements, and at least one control input coupled to at least one first output of the sequencing unit on which the storage signal is intended to be outputted,

a second addressing circuit comprising at least three data inputs each one coupled to an output of one of the storage elements, an output coupled to an input of the display unit, and at least one control input coupled to at least one second output of the sequencing unit on which the display signal is intended to be outputted,

and wherein the sequencing unit is configured such that, for each pixel;

during the storage of a bit triggered by the storage signal, the first addressing circuit applies on the input of one of the three storage elements the bit received on its data input,

during the display of one of the stored bits triggered by the display signal, the second addressing circuit applies on an input of the display unit one of the stored bits in the three storage elements.

10. The image display device according to claim 9, wherein the first addressing circuit comprises:

a first address generator comprising an input coupled to the first output of the sequencing unit,

a demultiplexer comprising a data input coupled to the input of the pixel intended to receive the binary words of the images to be displayed, at least three outputs each one coupled to the input of one of the storage elements, and a control input coupled to an output of the first address generator,

wherein the second addressing circuit comprises;

a second address generator comprising an input coupled to the second output of the sequencing unit,

a multiplexer comprising at least three data inputs each one coupled to the output of one of the storage elements, an output coupled to the input of the display unit, and a control input coupled to an output of the second address generator,

and wherein the sequencing unit is configured such that, for each pixel;

during the storage of a bit triggered by the storage signal, the first address generator outputs to the demultiplexer a first address signal encoding over several bits the address of one of the storage elements in which said bit is intended to be stored,

during the display of one of the stored bits triggered by the display signal, the second address generator outputs to the multiplexer a second address signal encoding over several bits the address of one of the storage elements from which said one of the stored bits is read.

11. The image display device according to claim 9, wherein the sequencing unit is configured such that the storage signal is formed from at least three first addressing signals each one controlling a storage in one of the storage elements, and such that the display signal is formed from at least three second addressing signals each one controlling a reading of a bit stored in one of the storage elements.

12. The image display device according to claim 9, wherein the first addressing circuit comprises:

a first counter comprising an input coupled to the first output of the sequencing unit,

a first address decoder comprising a data input coupled to the input of the pixel intended to receive the binary words, at least three outputs each one coupled to the input of one of the storage elements, and a control input coupled to an output of the first counter,

wherein the second addressing circuit comprises;

a second counter comprising an input coupled to the second output of the sequencing unit,

a second address decoder comprising at least three data inputs each one coupled to the output of one of the storage elements, an output coupled to the input of the display unit, and a control input coupled to an output of the second counter.

13. The image display device according to claim 1, wherein:

the storage unit is configured to store at least N+1 bits; and

during said display of one of the bits of one of the binary words of the first image, the storage signal triggers the storage of the N bits of the binary word of the second image or the storage of N−

1 bits of the binary word of the first image and of one bit of the binary word of the second image.

14. The image display device according to claim 1, wherein the display unit of each pixel comprises M light-emitting diodes, and wherein the storage unit of each pixel comprises a number of inputs configured to receive the binary words of the images to be displayed by the display unit of the pixel which is greater than or equal to 1 and which is less than or equal to M, with M corresponding to a whole number greater than or equal to 1.

15. The image display device according to claim 1, wherein the pixels are formed by modules made on a substrate, with each module comprising at least:

one first portion located on the side of the substrate and forming an electronic circuit comprising at least the storage unit of the pixel;

a second portion such that the first portion is arranged between the substrate and the second portion, and forming at least one portion of the display unit of the pixel.

16. The image display device according to claim 15, wherein:

the second portion of each module corresponds to a single light-emitting diode, or

each module comprises several second portions each one forming a light-emitting diode and arranged on a first portion common to said several second portions.

17. The image display device according to claim 15, wherein each pixel comprises a single module, or

wherein each pixel comprises several modules and an electronic circuit coupled to the substrate, next to said several modules, and forming a portion of the storage unit of the pixel.

18. Method for image display by an image display device comprising at least one matrix of pixels, carrying out a successive display of images each one encoded in the form of several binary words of the BCM type encoded over N bits, with N a whole number greater than or equal to 2, each pixel displaying, during the display of an image, at least one light signal during a duration corresponding to a value encoded in at least one of the binary words of the image, each one of the N bits of said at least one of the binary words of the image representing a duration of display that is proportional to the weight of the bit,

the method comprising, during the display of one of the bits of one of the binary words of the first image by the display unit of the pixel and for each pixel, a storage, in a storage unit arranged in the pixel and comprising an input configured to receive the binary words of the images to be displayed, of at least two other bits of one of the binary words of a second image intended to be displayed after the first image and/or of said one of the binary words of the first image.

19. Method for image display according to claim 18, wherein said at least two other bits of one of the binary words of the second image and/or of said one of the binary words of the first image are stored sequentially in the storage unit during said display of one of the bits of one of the binary words of the first image.