Interval Time Control for 5G Multi-Connectivity

• US 20190313349A1
• Filed: 06/23/2016
• Published: 10/10/2019
• Est. Priority Date: 06/23/2016
• Status: Active Grant

• Current Assignee: Telefonaktiebolaget LM Ericsson
• Original Assignee: Telefonaktiebolaget LM Ericsson
• Inventors: Wigren, Torbjorn, Delgado Pulgar, Ramon Alejandro, Lau, Katrina, Middleton, Richard
• Granted Patent: US 10,728,867 B2
• Time in Patent Office: Days
• CPC Class Codes: H04W 56/00 Synchronisation arrangements
• CPC Class Codes: H04W 56/001 Synchronization between nodes

Abstract

The solution presented herein controls a transmission timing of data from multiple transmission points to synchronize the data reception at a receiver to within pre-specified limits. To that end, a skew timing is determined from a difference between a second delay (a transmission time between the master node and a second slave node) and a first delay (a transmission time between a master node and a first slave node). A deadzone mapping is applied to the initial liming error (determined from a difference between a reference skew timing and the skew timing) to determine a final timing error. The deadzone mapping is configured to adjust the initial timing error responsive to a comparison between the initial timing error and a timing error range. The first and second delays are controlled using the final timing error to keep the skew timing within the timing error range.

Claims

1-29. -29. (canceled)

30. A method implemented in a master node of controlling a transmission timing for a plurality of slave nodes in a communication network, the method comprising:

determining a skew timing (T_skew) from a difference between a second delay (T_second) and a first delay (T_first), wherein the first delay (T_first) represents a transmission time between the master node and a first slave node (300), and wherein the second delay (T_second) represents a transmission time between the master node and a second slave node;

determining an initial timing error (x_init) from a difference between a reference skew timing (T_skew^ref) and the skew timing (T_skew);

applying a deadzone mapping to the initial timing error (x_init) to determine a final timing error (x_final), wherein the deadzone mapping is configured to adjust the initial timing error (x_init) responsive to a comparison between the initial timing error (x_init) and a timing error range, said timing error range including an upper limit (u_max) and a lower limit (u_min) used to bound the timing error range; and

controlling the first delay (T_first) and the second delay (T_second) using the final timing error (x_final) to keep the skew timing (T_skew) within the timing error range.

31. A master node in communication with a plurality of slave nodes of a communication network, the master node comprising:

a first combiner circuit configured to determine a skew timing (T_skew) from a difference between a second delay (T_second) and a first delay (T_first), wherein the first delay (T_first) represents a transmission time between the master node and a first slave node, and wherein the second delay (T_second) represents a transmission time between the master node and a second slave node);

a second combiner circuit (240) configured to determine an initial timing error (x_init) from a difference between a reference skew timing (T_skew^ref) and the skew timing (T_skew);

a deadzone mapping circuit configured to adjust the initial timing error (x_init) to determine a final timing error (x_final) responsive to a comparison between the initial timing error (x_init) and a timing error range, said timing error range including an upper limit (u_max) and a lower limit (u_min) used to bound the timing error range; and

an outer loop control circuit configured to control the first delay (T_first) and the second delay (T_second) using the final timing error (x_final) to keep the skew timing (T_skew) within the timing error range.

32. The master node of claim 31 wherein the deadzone mapping circuit is configured to determine the final timing error (x_final) by:

comparing the initial timing error (x_init) to at least one of the upper and lower limits of the timing error range;

if the initial timing error (x_init) is within the timing error range, setting the final timing error (x_final) to zero; and

if the initial timing error (x_init) is outside the timing error range, determining the final timing error (x_final) using the initial timing error (x_init) and one of the upper and lower limits.

33. The master node of claim 32 wherein the deadzone mapping circuit is configured to determine the final timing error (x_final) when the initial timing error (x_init) is outside the timing error range by:

subtracting the upper limit (u_max) from the initial timing error (x_init) to determine the final timing error (x_final) when the initial timing error (x_init) exceeds the upper limit (u_max); and

subtracting the lower limit (u_min) from the initial timing error (x_init) to determine the final timing error (x_final) when the lower limit (u_min) exceeds the initial timing error (x_init).

34. The master node of claim 31 wherein the outer loop control circuit is configured to control the first delay (T_first) and the second delay (T_second) by:

determining a first reference value (T_first^ref) responsive to the final timing error (x_final) and a first backhaul delay (T_first^DL) for a first channel between the master node and the first slave node;

determining a second reference value (T_second^ref) responsive to the final timing error (x_final) and a second backhaul delay (T_second^DL) for a second channel between the master node and the second slave node;

controlling the first delay (T_first) using the first reference value (T_first^ref); and

controlling the second delay (T_second) using the second reference value (T_second^ref).

35. The master node of claim 34 wherein:

the first combiner circuit is further configured to;

determine a sum timing (T_sum) from a sum of the first delay (T_first) and the second delay (T_second); and

determine a sum timing error (x_r) from a difference between a reference sum timing (T_sum^ref) and the sum timing (T_sum);

the outer loop control circuit comprises;

a skew filter circuit configured for a control channel of the second slave node and configured to filter the final timing error (x_final) to generate a filtered timing error ({circumflex over (x)});

a sum filter circuit configured for a delay sum channel and configured to filter the sum timing error (x_r) to generate a filtered sum timing error ({circumflex over (x)}_r);

a third combiner circuit configure to determine the second reference value (T_second^ref) from the filtered timing error ({circumflex over (x)}), the filtered sum timing error ({circumflex over (x)}_r), and the second backhaul delay (T_second^DL); and

a fourth combiner circuit configured to determine the first reference value (T_first^ref) from the filtered sum timing error ({circumflex over (x)}_i), the filtered timing error and the first backhaul delay (T_first^DL).

36. The master node of claim 31 wherein the plurality of slave nodes are configured to transmit signals to a wireless terminal, and wherein the upper limit (u_max) and the lower limit (u_min) are derived based on a length of a buffer in the wireless terminal.

37. The master node of claim 31 wherein each slave node connects to the master node via an inner feedback loop and an outer feedback loop, and wherein the master node is further configured to control a stability of the inner and outer feedback loops according to a Popov criterion.

38. The master node of claim 37 wherein the master node controls the stability of the inner and outer feedback loops according to the Popov criterion by configuring one or more controller filters associated with a control loop gain of the inner and outer feedback loops, said outer feedback loop being responsive to a maximum slope of the deadzone mapping.

39. The master node of claim 31 wherein each slave node connects to the master node via an inner feedback loop and an outer feedback loop, and wherein the master node is further configured to control a stability of the outer feedback loop by configuring one or more controller filters associated with a control loop gain responsive to a maximum slope of the deadzone mapping relative to a transfer function representative of each of the inner and outer feedback loops according to a Popov criterion.

40. The master node of claim 39 wherein the master node is configured to control the stability of the outer feedback loop by satisfying:

41. The master node of claim 31 further comprising an interface circuit configured to:

receive the first delay (T_first) in a first signaling message comprising an identity number of the first slave node, a first bearer identity number, and a first information element including the first delay; and

receive the second delay (T_second) in a second signaling message comprising an identity number of the second slave node, a second bearer identity number, and a second information element including the second delay.

42. The master node of claim 31 further comprising an interface circuit configured to receive the first delay from the first slave node via an intermediate node.

43. The master node of claim 31 further comprising an interface circuit configured to receive the second delay from the second slave node via an intermediate node.

44. A computer program product stored in a non-transitory computer readable medium for controlling a transmission timing for a plurality of slave nodes in a communication network, the computer program product comprising software instructions which, when run on a processing circuit in the master node, causes the processing circuit to:

determine a skew timing (T_skew) from a difference between a second delay (T_second) and a first delay (T_first), wherein the first delay (T_first) represents a transmission time between the master node and a first slave node, and wherein the second delay (T_second) represents a transmission time between the master node and a second slave node;

determine an initial timing error (x_init) from a difference between a reference skew timing (T_skew^ref) and the skew timing (T_skew);

apply a deadzone mapping to the initial timing error (x_init) to determine a final timing error (x_final), wherein the deadzone mapping is configured to adjust the initial timing error (x_init) responsive to a comparison between the initial timing error (x_init) and a timing error range, said timing error range including an upper limit (u_max) and a lower limit (u_min) used to bound the timing error range; and

control the first delay (T_first) and the second delay (T_second) using the final timing error (x_final) to keep the skew timing (T_skew) within the timing error range.