DC ELECTROLUMINESCENT CROSSED-GRID PANEL WITH DIGITALLY CONTROLLED GRAY SCALE

• US 3,761,617 A
• Filed: 06/17/1971
• Issued: 09/25/1973
• Est. Priority Date: 06/20/1970
• Status: Expired due to Term

• Current Assignee: Hitoshi Takeda, Masami Yoshiyama, Mitsuharu Tsuchiya, Teruo Sato
• Original Assignee: Hitoshi Takeda, Masami Yoshiyama, Mitsuharu Tsuchiya, Teruo Sato
• Inventors: Tsuchiya, Mitsuharu, Sato, Teruo, Takeda, Hitoshi, Yoshiyama, Masami
• Primary Examiner(s): Griffin, Robert L.
• Assistant Examiner(s): Stellar, George G.
• Application Number:
  US05/153,946
• Time in Patent Office: 831 Days
• Field of Search: 315/169TV 313/18B,18C,18D 250/213A 178/7.3D,7.5D
• US Class Current: 348/800
• CPC Class Codes: G09G 3/30 using electroluminescent panels
• CPC Class Codes: H04N 3/12 by switched stationary formation of lamps, photocells or light relays
• CPC Class Codes: H04N 3/14 by means of electrically scanned solid-state devices for picture generation H04N25/00

Abstract

A scanning apparatus for a DC electroluminescent crossed-grid panel has an X-line driving circuit, a Y-line driving circuit, a video signal generator, a timing signal generator, a sample-hold circuit, an analog-to-digital converter, and a width-control signal generator. The Y-line driver has a set of first memory circuits for writing sequentially coded video signals for one horizontal line period, a set of second memory circuits for simultaneously holding the coded video signals during one horizontal line period, and a set of brightness control circuits for supplying Y-line driving pulses to corresponding Y-lines in response to the coded video signals.

Claims

1. A scanning apparatus for a DC electroluminescent crossed-grid panel having a multiplicity of electroluminescent elements at the intersections of X and Y-line conductors, said scanning apparatus comprising an X-line driving circuit coupled to said X-line conductors for supplying X-line selecting pulses to the X-line conductors to be scanned in predetermined sequence;

a Y-line driving circuit coupled to said Y-line conductors;

a video signal generator for generating video signals;

a timing signal generator coupled between said video signal generator, said Y-line driving circuit and said X-line driving circuit;

a sample-hold circuit coupled to said video signal generator and said timing signal generator for sampling said video signals by sampling signals from said timing signal generator;

an analog-to-digital converter coupled between said sample-hold circuit and said Y-line driving circuit for converting the sampled video signals into coded video signals which are supplied to said Y-line driving circuit; and

a width-control signal generator coupled between said timing signal generator and said Y-line driving circuit for supplying said Yline driving circuit with a plurality of width-control signals which are not time coincident with each other;

said Y-line driving circuit comprising a set of first memory circuits for sequentially writing said coded video signals for one horizontal line period from said analog-to-digital converter, a set of second memory circuits coupled to the memory circuits in said set of first memory circuits for holding simultaneously said coded video signals from said set of first memory circuits during one X-line period, and a set of brightness control circuits coupled to said memory circuits in said set of second memory circuits, and each circuit of said set of brightness control circuits consisting of a driver for supplying a Y-line driving pulse to a corresponding Y-line and a plurality of AND gates coupled between a corresponding memory circuit in said set of second memory circuits, said width control signal generator and said driver for supplying said driver with brightness control signals which are synthesized, at said plurality of AND gates, from said plurality of width-control signals and said coded video signals.

2. A scanning apparatus as claimed in claim 1 wherein said set of first memory circuits, said second memory circuits and said plurality of AND gates are an n-bit parallel shift register, an n-bit parallel memory register, and n parallel-connected AND gates, respectively, so that said coded video signals are n-bit parallel-coded video signals.

3. A scanning apparatus as claimed in claim 1 wherein said width-control signal generator generates n width-control signals which are not time coincident with each other, and which are different in the pulse-wdith from each other and are in a pulse-width relation:

20;

21;

22 . . . ;

2n 1 in one X-line period.

4. A scanning apparatus as claimed in claim 1 wherein said analog-to-digital converter is directly coupled to said timing signal generator and has two analog-to-digital conversion states which are changed by quantizing level control signals in synchronization with vertical synchronizing signals of the video signal, whereby the analog-to-digital conversion of sampled video signals for one image is divided into two field periods so that the sampled video signals are converted with the first and the second analog-to-digital conversion states in the first and the second field periods, respectively.

5. A scannong apparatus for a DC electroluminescent crossed-grid panel having a multiplicity of electroluminescent elements at the intersections of X and Y-line conductors, said scanning apparatus comprising an X-line driving circuit coupled to said X-line conductors for supplying X-line selecting pulses to the X-line conductors to be scanned in predetermined sequence;

a Y-line driving circuit coupled to said Y-line conductors;

a video signal generator for generating video signals;

a timing signal generator coupled between said video signal generator, said Y-line driving circuit and said X-line driving circuit;

a sample-hold circuit coupled to said video signal generator and said timing signal generator for sampling said video signals by sampling signals from said timing signal generator;

an analog-to-digital converter coupled between said sample-hold circuit and said Y-line driving circuit for converting the sampled video signals into coded video signals which are supplied to said Y-line driving circuit; and

a width-control signal generator coupled between said timing signal generator and said Y-line driving circuit for supplying said Y-line driving circuit with a plurality of width-control signals which are not time coincident with each other;

said Y-line driving circuit comprising a set of first memory circuits for sequentially writing said coded video signals for one horizontal line period from said analog-to-digital converter, a set of second memory circuits coupled to the memory circuits in said set of first memory circuits for holding simultaneously said coded video signals from said set of first memory circuits during one X-line period, and a set of brightness control circuits coupled to said memory circuits in said set of second memory circuits, said set of brightness control circuits consisting of even numbered brightness control circuits alternating with odd numbered brightness control circuits, each of the odd numbered brightness control circuits consisting of a driver for supplying a Y-line driving pulse to a corresponding Y-line and a plurality of AND gates coupled between a corresponding memory circuit in said set of second memory circuits, said width control signal generator and said driver for supplying said driver with brightness control signals which are synthesized, at said plurality of AND gates, from said plurality of width-control signals and said coded video signals, and each of the even numbered brightness control circuits consisting of a driver for supplying a Y-line driving pulse to a corresponding Y-line and a switching circuit which is coupled to said timing signal generator so as to receive a switching signal from said timing signal generator and which is also coupled to the two odd numbered AND gates in the two adjacent odd numbered bright-ness control circuits so that one of the brightness control signals from the said two odd numbered AND gates selectively operates the driver of the even numbered brightness control circuit when switched by said switching signals in synchronization with a synchronizing signal of the video signal, and said sample-hold circuit is coupled to said timing signal generator so that the sampling time of the video signal is selectively switched between the sampling time for odd and even numbered sampling signals by said switching signal.

6. A scanning apparatus as claimed in claim 5 wherein said synchronizing signal of the video signal is a vertical synchronizing signal of the video signal.