SOLID STATE CRASH RECORDER

• US 3,781,824 A
• Filed: 11/20/1972
• Issued: 12/25/1973
• Est. Priority Date: 11/20/1972
• Status: Expired due to Term

• Current Assignee: David C. Wight, Frank P. Caiati
• Original Assignee: David C. Wight, Frank P. Caiati
• Inventors: Caiati, Frank P., Wight, David C.
• Primary Examiner(s): Henonon, Paul J.
• Assistant Examiner(s): Nusbaum, Mark Edward
• Application Number:
  US05/308,005
• Time in Patent Office: 400 Days
• Field of Search: 340/172.5,173R,22 307/9,10,221R 346/33EC,44 235/92SH
• US Class Current: 346/33.00R
• CPC Class Codes: G01P 1/127 for acceleration values
• CPC Class Codes: G07C 5/085 using electronic data carriers

Abstract

A solid state crash recorder in which various vehicle conditions such as acceleration and speed are continually monitored and converted into digital form with the magnitude of the conditions monitored being cyclically stored in a plurality of registers. Upon the sensing of a crash, the contents of a portion of the registers corresponding to certain vehicle conditions, such as speed and low level acceleration, are maintained so as to provide information relating to precrash conditions while information relating to other conditions, such as high acceleration, are continually fed to the remaining registers with the output thereof being routed, when a crash is sensed, to a memory circuit. In this manner, pre and post crash information relating to those conditions are memorized. Subsequently, the contents of the registers containing only precrash information are routed to the memory circuit which memorizes the precrash conditions represented thereby. When the contents of all the registers have been memorized in the memory circuit, the power supplied to the system is disabled so as to prevent further inputs to the crash recorder.

Claims

1. A vehicle crash recorder for recording pre and post crash information of a vehicle condition comprising:

means responsive to the condition for generating a signal having a magnitude related thereto;

means for sampling the magnitude of the signal at specified time intervals;

means coupled to the last mentioned means and responsive to each sampling of the signal for generating a digital word comprised of a serial train of a predetermined number of bits representing the magnitude of the sampled signal;

means for generating clocking pulses synchronized with the bits in the digital word;

a shift register having a number of stages, the shift register being coupled to the means for generating a digital word and means for generating clocking pulses and responsive to the digital word and clocking pulses generated thereby for shifting the bits in the digital words into and out of each of the stages in sequence, the number of stages in the shift register being equal to the number of bits in a predetermined number of digital words;

means responsive to a vehicle crash for generating a crash signal; and

means coupled to the last mentioned means and the means for generating clocking pulses and responsive to the crash signal for inhibiting the means for generating clocking pulses after said means generates clocking pulses synchronized with the bits in a number of digital words other than the predetermined number of digital words whereby at least a portion of the digital words in the shift register prior to the crash signal provides information relating to precrash information of the vehicle condition and at least a portion of the words supplied to the shift register after the crash signal provides post-crash information of the vehicle condition.

2. A vehicle crash recorder for recording pre and post crasH information of a vehicle condition comprising:

means responsive to the condition for generating a signal having a magnitude related thereto;

means for sampling the magnitude of the signal at specified time intervals;

means coupled to the last mentioned means and responsive to each sampling of the signal for generating a digital word comprised of a serial train of a predetermined number of bits representing the magnitude of the sampled signal;

means for generating clocking pulses synchronized with the bits in the digital word;

a shift register having a number of stages, the shift register being coupled to the means for generating a digital word and means for generating clocking pulses and responsive to the digital word and clocking pulses generated thereby for shifting the bits in the digital words into and out of each of the stages in sequence, the number of stages in the shift register being equal to a number of bits in a predetermined number of digital words;

a memory circuit;

means responsive to a vehicle crash for generating a crash signal;

means coupled to said last mentioned means and responsive to the crash signal for coupling the output of the last stage of the shift register to the memory circuit;

means coupled to the means for generating a crash signal and responsive to the crash signal for selecting a respective address in the memory circuit for each bit shifted out of the last stage in the shift register; and

means for inhibiting the means for generating clocking pulses after said means generates clocking pulses synchronized with the bits in a selected number of digital words greater than the predetermined number of digital words after the vehicle crash, whereby the memory circuit memorizes the predetermined number of digital words representing precrash information of the vehicle condition and memorizes a number of words equal to the selected number representing post-crash information of the vehicle condition.

3. A vehicle crash recorder for recording pre and post crash information of the magnitude of a first vehicle condition and recording precrash information of the magnitude of a second vehicle condition comprising:

means for periodically generating a digital word comprised of a serial train of a number of bits representing the magnitude of the first vehicle condition;

means for periodically generating a digital word comprised of a serial train of a number of bits representing the magnitude of the second vehicle condition;

a first shift register;

means for periodically shifting the bits in the digital words representing the magnitude of the first vehicle condition into and out of each stage of the first shift register in sequence, the number of stages in the first shift register being equal to the number of bits in a first predetermined number of digital words representing the first vehicle condition;

a second shift register;

means for periodically shifting the bits in the digital words representing the magnitude of the second vehicle condition into and out of each of the stages of the second shift register in sequence, the number of stages in the second shift register being equal to the number of bits in a second predetermined number of digital words representing the second vehicle condition;

a memory circuit;

means responsive to a vehicle crash for generating a crash signal;

means responsive to the crash signal for inhibiting the means for periodically shifting the bits in the digital words rerpesenting the magnitude of the second vehicle condition into stages of the second shift register;

means responsive to the crash signal for coupling the bits shifted out of the last stage of the first shift register to the memory circuit until a number of digital words in excess of the first predetermined number of digital words is shifted into the first shift register;

means for selecting a respective address in the memory circuit for each bit coupled thereto from the first shift register;

means for coupling the bits shifted out of the last stage of the second shiFt register to the memory system after the number of digital words in excess of the first predetermined number of digital words is shifted into the first shift register;

means for sequentially shifting the bits contained in the second shift register out of the last stage therein to the memory system; and

means for selecting a respective address in the memory system for each bit supplied thereto from the second shift register, whereby the memory system contains pre and post crash information of the first vehicle condition and precrash information of the second vehicle condition.