Transfer function realization with one-bit coefficients

• US 3,906,400 A
• Filed: 12/17/1973
• Issued: 09/16/1975
• Est. Priority Date: 12/17/1973
• Status: Expired due to Term

• Current Assignee: M/A Com
• Original Assignee: Dennis Jay Gooding, Peter Holden Anderson
• Inventors: Gooding, Dennis Jay, Anderson, Peter Holden
• Primary Examiner(s): Brody, Alfred L.
• Application Number:
  US05/425,250
• Time in Patent Office: 638 Days
• Field of Search: 328/167 332/11R,11D 325/38R,38B,42 333/18R,7T
• US Class Current: 341/77
• CPC Class Codes: H03H 17/06 Non-recursive filters
• CPC Class Codes: H03H 17/0614 using Delta-modulation
• CPC Class Codes: H04B 3/21 using a set of bandfilters

Abstract

A tapped delay unit includes an input terminal for receiving an input signal and a number of taps for furnishing signals related to the input signal delayed by progressively increasing time intervals. A one-bit multiplier representative of either the binary digit ONE or ZERO couples a respective delay tap to a summing network that provides as an output the sum of the individual outputs provided by the multipliers. In one form of the invention the tapped delay unit is a tapped delay line. In another form of the invention the storage unit is a shift register or other memory device. According to another aspect of the invention the input signal is applied to a delta modulator that provides a sequence of binary samples, and the output of the summing network is a sequence of pulses applied to an accumulator.

Claims

1. Non-recursive filtering a apparatus for establishing a predetermined transfer characteristic between an input terminal and an output terminal comprising, a plurality of output taps, delay means for furnishing a predetermined delay to a signal applied to said input terminal between said input terminal and each of said taps, a gain control unit associated with each of said taps for transmitting the signal associated with the associated tap with gain of substantially constant amplitude and a selected one of positive and negative polarities, said gain of substantially constant amplitude being the same for each gain control unit, means for cumulatively combining the outputs from each of said gain control units to provide an output signal on said output terminal corresponding to said input signal applied to said input terminal modified in accordance with the transfer characteristic determined by said delay means, said gain control units and said means for cumulatively combining, and integrating means responsive to said output signal for providing an integrated output signal representative of the time integral of said output signal.

2. Apparatus for establishing a predetermined transfer characteristic in accordance with claim 1 wherein said delay means comprises a tapped delay line.

3. Apparatus for establishing a predetermined transfer characteristic in accordance with claim 1 wherein said delay means comprises a serial memory for storing binary digits and said means for integrating comprises an accumulator for receiving the signals provided by said means for cumulatively combining.

4. Apparatus for establishing a predetermined transfer characteristic in accordance with claim 3 and further comprising, means for delta modulating an analog input signal to provide a delta modulation representation thereof, means for coupling the delta modulated representation to the input of said delay means, and a second accumulator for receiving signals provided by the first-mentioned accumulator.

5. A method of nonrecursively filtering an input signal which method includes the steps of, furnishing a predetermined plurality of different delays to said input signal to provide a corresponding plurality of delayed signals, imparting a predetermined gain to each delayed signal of substantially constant amplitude and a selected one of positive and negative polarities to provide a corresponding plurality of gain-controlled delay signals, said gain of substantially constant amplitude being the same for each delayed signal, cumulatively combining the gain-controlled delayed signals to provide an output signal, and integrating said output signal to provide an integrated output signal representative of the time integral of said output signal.

6. A method of processing an input signal in accordance with claim 5 and further including, providing said input signal in digital form, and imparting said gain to each delayed signal by digital multiplication, the step of combining the gain-controlled delayed signals including accumulating said signals.

7. A method of processing an input signal in accordance with claim 6 and further including the step of delta modulating an analog signal to provide as said input signal a delta modulated signal.