Electronic data processing security system and method

• US 3,931,504 A
• Filed: 12/12/1973
• Issued: 01/06/1976
• Est. Priority Date: 02/07/1972
• Status: Expired due to Term

• Current Assignee: Basic Computing Arts Incorporated
• Original Assignee: Basic Computing Arts Incorporated
• Inventors: Jacoby, Edward A.
• Primary Examiner(s): Malzahn, David H.
• Application Number:
  US05/424,014
• Time in Patent Office: 755 Days
• Field of Search: 235/153 A, 235/153 R, 340/172.5, 444/1
• US Class Current: 726/23
• CPC Class Codes: G06F 21/52 during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
• CPC Class Codes: G06F 2207/7219 Countermeasures against side channel or fault attacks
• CPC Class Codes: G06F 2221/2101 Auditing as a secondary aspect

Abstract

A system and method for controlling the security of data in a central high speed data processing unit (CPU) by electronically sensing and comparing all operating or control statements coming into the CPU from terminal devices with a vocabulary of all statements unacceptable for security reasons which unacceptable statements are stored in a remote secondary computer system. The security of the data is also controlled by electronically sensing and comparing all operating and problem steps loaded into the CPU from library devices with a collection of identifiers known to identify all correct versions. The reaction to security dangers found in either sensing and comparing method is to exert predetermined counteraction to preclude unauthorized removal, alteration, destruction or inspection of problem data and/or procedures.

The system includes a plurality of sensors which monitor operating control statements, operating and problem steps or procedures and physical switches on the CPU control panel. The remote secondary computer analyzes the sensor output and responds by a predetermined counteraction which includes initiating an alarm and descriptive printout at a remote location and indicating the source and severity of any security violation. Further, the secondary computer may interrupt the CPU and drain any illegal control statements and prevent the loading of the operating process and problem steps.

Claims

1. An electronic system for preventing undetected alteration, destruction, removal or reproduction of data available to a central processing unit (CPU) of a computer implementing at least one problem process and an operating process comprising:

means for monitoring operating statements communicated to the CPU for the operating process and means for monitoring problem steps to be used by the operating process in governing the problem process, both said monitoring means electronically reflecting the nature of the information monitored;

means for comparing the monitored information with predetermined standards comprising representations of operating statements and problem steps; and

means for initiating a predetermined counteraction when the comparing means electronically indicates that the monitored information is outside the limits defined by the predetermined standards.

2. A system as defined in claim 1 comprising control and library devices and data channels connecting the CPU and corresponding control and library devices and wherein both said monitoring means comprise means for electronically reflecting electric signal pulses transferred along the data channels to the comparing means without altering or interrupting the flow of signal pulses between the control and library devices and the CPU.

3. A system as defined in claim 1 wherein said comparing means is encompassed within a secondary computer comprising:

a memory device controlled by the secondary computer, the memory device storing a collection of representations of statements and problem steps requiring special authority; and

means comprising the comparing means and communicating with the memory device for electronically retrieving the representations from the memory device for comparison with information monitored by at least one of the operating statement and problem step monitoring means.

4. A system as defined in claim 1 wherein said initiating means comprises means for recording events identifying the monitored information which is found outside limits defined by the predetermined standards and means for energizing a humanly discernable alarm.

5. A system as defined in claim 1 wherein said initiating means comprises means for suppressing unauthorized operating statements and problem steps before the effect thereof inheres in the operating process of the CPU.

6. A system as defined in claim 1 further comprising means for sensing physical tampering at at least one location in the system and developing an electronic tamper signal, means communicating the tamper signal to the initiating means and means comprising part of the initiating means for generating a tamper alert counteraction in response to the tamper signal.

7. A method for preventing undetected alteration, removal, destruction or inspection of data available to a central processing unit (CPU) comprising the steps of:

establishing a problem process in the CPU for processing problem data to problem results;

governing the problem process with an operating process, which operating process responds to operating statements and implements program steps;

sensing first electric pulse representations of the operating statements to develop a corresponding electric pulse sequence which represents the actual operating statements used;

sensing second electric pulse representations of the problem steps to develop a corresponding electric pulse sequence which represents the actual problem steps used;

comparing at least one of the corresponding electric pulse sequences with a predetermined standard comprising electric pulse representations of corresponding standard operating statements and standard problem steps; and

electronically initiating predetermined counteraction when any part of the pulse sequence is found outside the limits defined by the predetermined standard.

8. A method as defined in claim 7 wherein said comparing step is preceded by creating a comparative standard by developing a table of expected statistics comprising a collection of electronic pulse representations indentifying permissible operating statements and problem steps and storing the table of expected statistics in a memory which is separate from the CPU.

9. A method as defined in claim 8 wherein said predetermined counteraction comprises suppressing all operating statements and problem steps.

10. A method as defined in claim 8 wherein said predetermined counteraction comprises generating a humanly discernable alarm and recording the identification of the illegitimate operating statement or problem step.

11. A method for electronically monitoring operating statements to prevent undetected alteration, removal, destruction, or inspection of data available to a central processing unit (CPU), the steps of:

preparing a vocabulary of operating statements which are permitted only by special authority;

developing a collection of authority codes which is associated with the prepared vocabulary of operating statements and electronically storing the collection;

accompanying each authorized operating statement communicated to the CPU with an authority code;

scanning all operating statements submitted to the CPU to detect the existence and identity of the authority code;

comparing the data bit representation of the authority code with the data bit representation of the collection of codes to determine if the authority code is found accompanying the operating statement; and

initiating a predetermined electronically responsive counteraction where the operating statement is not accompanied by an authority code which is found in the collection of codes.

12. A method as defined in claim 11 wherein said preparing step comprises requiring operating statements to be accompanied by any one of a range of authority levels represented by a unique code corresponding to the nature of the operating statement, including no authority represented by the absence of an authority code as a lower bound of the range.

13. A method as defined in claim 11 wherein said accompanying step is preceded by entering a plurality of enabling codes into a card punch device and mechanically punching a unique code in each of a plurality of cards;

concealing the punched code in an array of punches; and

placing at least one of the encoded cards so as to be associated with cards carrying operating statements to be transferred to the CPU.

14. A method as defined in claim 13 wherein said punching step comprises omitting a selected digit from the range of authority codes to minimize predictability of the codes.

15. A method as defined in claim 11 wherein said accompanying step comprises entering authority codes at a keyboard terminal so as to be associated with corresponding operating statements transmitted to the CPU.

16. A method as defined in claim 11 wherein said electronically storing step comprises accumulating authority codes in a bit register, each bit being specifically identified to a unique authority code;

and setting the corresponding bit in the register for each of the codes detected in the scanning step thereby preventing use of a single authority code more than once.

17. A method as defined in claim 11 further comprising:

identifying a vocabulary of operating statements, each statement in the vocabulary being restricted;

collecting the vocabulary of restricted operating statements in a table and electronically storing the table;

comparing the data bit representation of each operating statement submitted to the CPU with the table prior to scanning the operating statements for an accompanying authority code; and

initiating a predetermined counteraction when the operating statement submitted to the CPU is found in the vocabulary of restricted operating statements.

18. A system for electronically monitoring operating statements in a digital computer to prevent undetected alteration, removal, destruction or inspection of data available to a central processing unit (CPU) comprising:

means compiling a vocabulary of data bit representations of operating statements permitted only by special authority;

means identifying each of the data bit representations of the operating statements in the vocabulary with an authority code;

means storing the vocabulary of data bit representations of operating statements and associated authority codes in an electronically retrievable form;

means scanning all data bit representations of operating statements submitted to the CPU to detect the existence and identity of any authority code associated with the operating statements submitted;

means comparing authority codes associated with the submitted representations of operating statements with the authority code associated with the corresponding stored representations of operating statements; and

means initiating a predetermined electronically responsive counteraction when the scanned authority code does not match the stored authority code for corresponding operating statements.

19. A system as defined in claim 18 further comprising:

additional means collecting a vocabulary of data bit representations of restricted operating statements and means electronically storing the data bit representations of the restricted operating statements in a retrievable form;

means comparing the representation of each operating statement submitted to the CPU with the stored vocabulary of representations of restricted operating statements; and

means initiating a predetermined electronically responsive counteraction when the representations of the operating statements submitted to the CPU are found in the vocabulary of representations of restricted operating statements.

20. A system as defined in claim 18 comprising means for mechanically punching authority codes in random order in card stock;

means for communicating enabling codes to the punching means; and

means for assembling the cards into a deck.