Erasable programmable read-only memory

  • US 3,938,108 A
  • Filed: 02/03/1975
  • Issued: 02/10/1976
  • Est. Priority Date: 02/03/1975
  • Status: Expired due to Term
First Claim
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1. A read-only memory deployed on a doped silicon substrate comprising:

  • a first region on said substrate having a higher dopant level than said substrate;

    a plurality of memory cells disposed in said first region, each of said cells including a floating gate for storing charge;

    a plurality of buffers disposed on said substrate, spaced apart from said first region, for communicating signals to said memory cells, each of said buffers including a plurality of field-effect transistors having channels with a first level of dopant and at least one field-effect transistor having a channel with a second level of dopant wherein said saecond level of dopant is higher than said first level of dopant;

    whereby said buffers act as level shifters to permit signals to be readily transmitted to said memory cells.

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