Process for treatment of semiconductor

• US 3,938,178 A
• Filed: 12/19/1972
• Issued: 02/10/1976
• Est. Priority Date: 12/22/1971
• Status: Expired due to Term

• Current Assignee: Origin Electric Company Limited
• Original Assignee: Origin Electric Company Limited
• Inventors: Miura, Shunji, Kawamata, Toshio
• Primary Examiner(s): Tupman, W.
• Application Number:
  US05/316,579
• Time in Patent Office: 1,148 Days
• Field of Search: 29/576 B, 29/578, 29/584, 29/585, 29/590, 317/235 AY, 357/91
• US Class Current: 257/590
• CPC Class Codes: H01L 21/00 Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
• CPC Class Codes: H01L 21/26 Bombardment with radiation H01L21/3105 takes precedence
• CPC Class Codes: Y10S 148/023 Deep level dopants
• CPC Class Codes: Y10S 438/904 Charge carrier lifetime control

Abstract

In the embodiment is specifically described a method for irradiating a transistor device with radiant rays. The top surface of the semiconductor crystal contained in the transistor device is exposed to the radiant rays so that the radiated energy impinging upon a preselected part of the base region, underneath the emitter electrode, is less than that impinging upon the other parts of the base region. Masking and radiant ray absorptive material are used to facilitate the process. Thereafter, the device and/or crystal is subjected to heat treatment to selectively improve such characteristics of the transistor as amplifying and switching characteristics to produce transistors suitable to a necessity of different applications.

Claims

1. A process for imparting desirable characteristics to transistor devices of the type having a base region exposed at one surface of said transistor and an emitter region positioned at one side of said base region between an emitter electrode and a non-exposed, masked portion of said base region, said exposed base region being unmasked, and said emitter electrode being of electron ray absorptive material, said process comprising the steps of, irradiating the transistor device with electron rays directed towards said one side of said base region and into said exposed portion of said base region but with said emitter electrode masking said masked portion of said base region, said electron rays being of sufficient energy to produce recombination centers in the unmasked base portion while leaving the masked base portion substantially free of lattice defects, and thereafter heat treating said transistor device.

2. The process described in claim 1 wherein said heat treating is carried on within the range between 220°

C and the maximum operating temperature of the transistor device.

7. An article of manufacture made by the process of claim 1.

3. In a process for treating transistor devices of the type having a base region exposed at one surface of said transistor and an emitter region positioned at one side of said base region between an emitter electrode and a masked portion of said base region, said exposed base region non-exposed being unmasked, and said emitter electrode being of electron ray absorptive material, the steps of, irradiating the transistor device with electron rays directed towards said one side of said base region to produce lattice effects selectively in said exposed portion of said base region and with said emitter electrode preventing the irradiating of said masked portion of said base region, said electron rays being of sufficient energy to produce recombination centers in the unmasked base portion while leaving the masked base portion substantially free of lattice defects, and thereafter heat treating said transistor device at a temperature within the range between the maximum operating temperature of the transistor device and 220°

C.

8. An article of manufacture made by the process of claim 3.

4. A process for imparting desirable characteristics to transistor crystals of the type having a base region exposed at one surface of said transistor and an emitter region positioned at one side of said base region between an emitter electrode and a non-exposed, masked portion of said base region, said exposed base region being unmasked, and said emitter electrode being of electron ray absorptive material, said process comprising the steps of, irradiating a transistor crystal with electron rays directed towards said one side of said base region and into said exposed portion of said base region but with said emitter electrode masking said masked portion of said base region, said electron rays being of sufficient energy to produce recombination centers in the unmasked base portion while leaving the masked base portion substantially free of lattice defects, and heat treating said transistor crystal.

5. The process as described in claim 4 which includes the step of placing an enclosure around the transistor.

6. The process as described in claim 5 in which said heat treating is carried on after the transistor has been placed in the enclosure.

9. An article of manufacture made by the process of claim 4.