Digital convolver matched filter and correlator
First Claim
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1. In a system for the digital implementation of convolvers, matched filters, correlators and multipliers, the combination of:
- a first digital delay means having a first random access memory for storing first signals in a first time sequence, said first memory having storage locations for N words;
a second digital delay means having a second memory for storing second signals, said second memory having storage locations for N words;
an address counter connected to said memories for addressing N corresponding storage locations of said first and second memories in a sampling interval providing N pairs of outputs in sequence, with each output of a pair of outputs being one of the time sequence or time-reverse sequence of said first time sequence;
clock means connected to said memories and to said address counter for controlling timing operations of said first and second memories and of said address counter, including means for shifting at least said first signals in said first memory after each sampling interval;
multiplier means having as its input the N pairs of outputs of said first and said second memories and providing at its output the serial word-by-word product of said first and said second signals; and
integrator means having said multiplier means output as an input for integrating the product over a number of sampling intervals and providing at its output one of the convolution or correlation of said first and said second signals.
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Abstract
A system for digital signal processing, including a random access memory (RAM) accessed by counters and used for storing and shifting signals in a convolver, correlator, matched filter or multiplier. An input signal and a reference signal are applied from opposite ends of the device such that the signals scan past each other at a relative velocity with respect to each other for obtaining either the convolution or correlation function of signals. The RAM operates as a shift register delay line and provides time scale inversion of signals when desired.
87 Citations
22 Claims
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1. In a system for the digital implementation of convolvers, matched filters, correlators and multipliers, the combination of:
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a first digital delay means having a first random access memory for storing first signals in a first time sequence, said first memory having storage locations for N words; a second digital delay means having a second memory for storing second signals, said second memory having storage locations for N words; an address counter connected to said memories for addressing N corresponding storage locations of said first and second memories in a sampling interval providing N pairs of outputs in sequence, with each output of a pair of outputs being one of the time sequence or time-reverse sequence of said first time sequence; clock means connected to said memories and to said address counter for controlling timing operations of said first and second memories and of said address counter, including means for shifting at least said first signals in said first memory after each sampling interval; multiplier means having as its input the N pairs of outputs of said first and said second memories and providing at its output the serial word-by-word product of said first and said second signals; and integrator means having said multiplier means output as an input for integrating the product over a number of sampling intervals and providing at its output one of the convolution or correlation of said first and said second signals. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method for the digital implementation of convolvers, matched filters, correlators and multipliers, including the steps of:
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storing first signals in a first time sequence in a first random access memory having storage locations for N words; storing second signals in a second memory having storage locations for N words; addressing corresponding storage locations of the first memory and the second memory in a sampling interval and providing N pairs of outputs in sequence, with each output of a pair of outputs being one of the time sequence or time-reverse sequence of said first time sequence; serially multiplying the N pairs of outputs from said first and second memories to produce the word-by-word product of said signals; shifting at least the first signals in the first memory after each sampling interval; and integrating the products of multiplication over a number of sampling intervals to produce one of the convolution or correlation of the first and second signals. - View Dependent Claims (19, 20, 21, 22)
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Specification
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Current AssigneeAdvanced Micro Devices, Inc.
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Original AssigneeJames Nickolas Constant
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InventorsConstant, James Nickolas
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Primary Examiner(s)Malzahn, David H.
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Application NumberUS05/595,240Time in Patent Office683 DaysField of Search235/156, 235/152, 235/164, 235/181US Class Current708/420CPC Class CodesG06F 17/15 Correlation function comput...
