Capacitive voltage multiplier

  • US 4,047,091 A
  • Filed: 07/21/1976
  • Issued: 09/06/1977
  • Est. Priority Date: 07/21/1976
  • Status: Expired due to Term
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First Claim
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1. A voltage multiplier comprising:

  • a plurality of capacitors connected in series across the output pads of an integrated circuit chip;

    a clock circuit providing multiphase voltage output;

    means connecting the pads of said chip to MOS transistor switches;

    means interconnecting said MOS switches to said clocking circuit such that during successive phases of operation said switches are closed in such a manner that the series connected capacitors are separately charged to the input voltage successively during each phase of said clock circuit; and

    means operable during the final phase of operation of said clock for connecting an output capacitor to said input voltage and said series connected capacitors such that the voltage developed across the output capacitors is the sum of all the voltages across the series connected capacitors plus the input voltage.

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