Battery charger

• US 4,087,733 A
• Filed: 05/18/1976
• Issued: 05/02/1978
• Est. Priority Date: 07/25/1975
• Status: Expired due to Term

• Current Assignee: Controlled Systems Limited
• Original Assignee: Controlled Systems Limited
• Inventors: Casagrande, Serge
• Primary Examiner(s): Hickey, Robert J.
• Application Number:
  US05/687,461
• Time in Patent Office: 714 Days
• Field of Search: 320/32, 320/DIG. 2, 320/39, 320/40, 320/37, 320/23, 320/25, 320/22
• US Class Current: 320/143
• CPC Class Codes: H02J 7/007182 in response to battery voltage
• CPC Class Codes: Y10S 320/30 Plural transformers

Abstract

A battery charger in which full-wave rectified current is supplied to a battery through a silicon controlled rectifier. By controlling the gating of the SCR the average charging current is controlled. An oscillator circuit formed by a unijunction transistor with a timing capacitor in its emitter circuit provides the necessary gating pulses. The charging rate of the capacitor is controlled to alter the period during which the SCR is conductive. This control of the charging rate is provided by a circuit responsive to battery voltage and by a circuit responsive to charging current. A portion of the battery-voltage responsive circuit acts to short-circuit the capacitor to stop charging in the event that the battery is connected with reverse polarity. A high charging-rate mode is controlled by a timer circuit which overrides the normal voltage and current control circuits.

Claims

1. A battery charger comprising a source of unidirectional current pulses adapted to be supplied to a battery,

a controllable switching device in series with said current source,

a timing capacitor,

a controllable current source operating in synchronism with the current pulses and connected to the timing capacitor,

a gating circuit including a unijunction transistor with its emitter circuit connected to the timing capacitor, producing control pulses coupled to said switching device to place it in conduction for a portion of the period of each unidirectional current pulse, said control pulses being in synchronism with said current pulses but having a variable period with respect thereto,

a battery voltage responsive control circuit producing a signal indicative of the difference between the battery voltage and a reference voltage, said signal being coupled to the controllable current source to control the charging rate of said capacitor,

transistor switching means coupled to the controllable current source to override the signal from the voltage control circuit and place said controllable current source in a condition of maximum supply, and timer means controlling said transistor switching means to limit the period of maximum supply.

2. A battery charger comprising a source of unidirectional current pulses adapted to be supplied to a battery,

a controllable switching device in series with said current source,

a first timing capacitor,

a controllable current source operating in synchronism with the current pulses and connected to the timing capacitor,

a gating circuit including a unijunction transistor with its emitter circuit connected to the timing capacitor, producing control pulses coupled to said switching device to place it in conduction for a portion of the period of each unidirectional current pulse, said control pulses being in synchronism with said current pulses but having a variable period with respect thereto,

a battery voltage responsive control circuit producing a signal indicative of the difference between the battery voltage and a reference voltage, said signal being coupled to the controllable current source to control the charging rate of said capacitor,

transistor switching means coupled to the controllable current source to override the signal from the voltage control circuit and place said controllable current source in a condition of maximum supply, and timer means controlling said transistor switching means, said timer means including an FET, a second timing capacitor connected in the gate circuit of the FET, said second timing capacitor being charged from the power supply for said transistor switching means.