Battery monitor circuit

• US 4,316,185 A
• Filed: 07/17/1980
• Issued: 02/16/1982
• Est. Priority Date: 07/17/1980
• Status: Expired due to Term

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Watrous, Donald L., Weischedel, Richard C.
• Primary Examiner(s): Caldwell, Jr., John W.
• Assistant Examiner(s): Myer, Daniel
• Application Number:
  US06/169,738
• Time in Patent Office: 579 Days
• Field of Search: 340/636, 340/661, 340/663, 320/48, 324/434, 324/431, 324/429, 324/433, 328/148, 328/146, 328/147, 307/355, 307/356, 307/357, 307/360, 307/361, 307/362, 307/364
• US Class Current: 340/636.11
• CPC Class Codes: G01R 31/3646 for indicating electrical conditions or variables, e.g. visual or audible indicators
• CPC Class Codes: G01R 31/389 Measuring internal impedance, internal conductance or related variables
• CPC Class Codes: G01R 31/396 Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
• CPC Class Codes: G08B 29/181 due to failing power supply

Abstract

A battery monitor circuit for rechargeable multicell batteries that provides a reliable indication of battery failure independent of temperature, load and age, by continuously comparing the impedance of the cells of the battery against each other. Comparison means are provided responsive to a first voltage at a tapped terminal of the battery that divides the battery cells into two groups, and to a second voltage that represents a fraction of the battery voltage corresponding to the ratio of the number of cells in each group, said comparison means generating an error signal when said first and second voltages change so as to experience a reversal in relative magnitude, which is indicative of cell deterioration.

Claims

1. A battery monitor circuit for a multicell rechargeable battery having a high voltage terminal and a reference terminal at opposite ends and an intermediate terminal that divides the cells of the battery into two groups comprising:

a. resistive voltage divider coupled across said high voltage and reference terminals, said voltage divider comprising first and second large resistance components joined by a relatively small third resistance component, a first voltage magnitude being derived from the junction of said first and third resistance components, and said second voltage magnitude being derived from the junction of said second and third resistance components, said first and second voltage magnitudes defining the limits of a voltage range;

b. means for coupling to said intermediate terminal so as to provide a third voltage magnitude corresponding to the voltage between said intermediate and reference terminals, said first and second voltage magnitudes being nominally offset to either side of said third voltage magnitude; and

c. comparison means including

1. a first comparator network responsive to said first and third voltage magnitudes for detecting battery cell low impedance deterioration in one group of cells and high impedance deterioration in the other group of cells;

2.

3. networks experience a reversal in relative magnitude. 2. A battery monitor circuit as in claim 1 in which said comparison means further comprises a fourth comparator network responsive to said reference voltage and to a fourth voltage magnitude proportional to the voltage between said high voltage and reference terminals for detecting battery cell high impedance deterioration in both groups of cells, said comparison means generating an error signal when input voltages to said fourth comparator network experience a reversal in relative magnitude.

2. A second comparator network responsive to said second and third voltage magnitudes for detecting battery cell high impedance deterioration in said one group of cells and low impedance deterioration in said other group of cells;

3. a third comparator network responsive to one of said first or second voltage amplitudes and a reference voltage for detecting battery cell low impedance deterioration in both groups of cells;

said comparison means generating an error signal when the respective input voltage magnitudes to any of said first, second, and third comparator

4. A battery monitor circuit as in claim 2 wherein said comparator networks have their outputs coupled together and operate in a logic OR configuration.

7. A battery circuit as in claim 4 in which said comparison means further comprises a fourth comparator network responsive to said reference voltage and to a fourth voltage magnitude proportional to the voltage between said pair of battery terminals at opposite ends of said two adjacent groups for detecting battery cell high impedance deterioration in both groups of cells, said comparison means generating an error signal when input voltages to said fourth comparator network experience a reversal in relative magnitude.

5. A battery monitor circuit for a multicell rechargeable battery having at least one intermediate terminal that divides the cells of the battery into a plurality of groups, comprising:

a. a resistive voltage divider coupled across a pair of battery terminals at opposite ends of two adjacent groups, said resistive voltage divider comprising a series resistance divided into first and second large resistance components joined by a relatively small third resistance component, a first voltage magnitude being derived from the junction of said first and third resistance components and a second voltage magnitude being derived from the junction of said second and third resistance components, said first and second voltage magnitudes defining the limits of a voltage range;

b. means for coupling to said intermediate terminal so as to provide a third voltage magnitude corresponding to the voltage across one of said two adjacent groups, said first and second voltage magnitudes being nominally offset to either side of said third voltage magnitude;

c. comparison means including

8. A battery monitor circuit as in claim 5 wherein said comparator networks have their outputs coupled together and operate in a logic OR configuration.

6. a first comparator network responsive to said first and third voltage magnitudes for detecting battery cell low impedance deterioration in one group of said two adjacent groups of cells and high impedance deterioration in the other group of said two adjacent groups of cells;

2. a second comparator network responsive to said second and third voltage magnitudes for detecting battery cell high impedance deterioration in said one group of cells and low impedance deterioration in said other group of cells;

3. a third comparator network responsive to one of said first or second voltage amplitudes and a reference voltage for detecting battery cell low impedance deterioration in both groups of cells;

said comparison means generating an error signal when the respective input voltage magnitudes to any of said first, second, or third comparator networks experience a reversal in relative magnitude.