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Apparatus for addressably controlling remote units

  • US 4,352,992 A
  • Filed: 02/27/1980
  • Issued: 10/05/1982
  • Est. Priority Date: 02/27/1980
  • Status: Expired due to Term
First Claim
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1. A load management system for a power network, the power network including a power generating source and a plurality of separately controllable loads, said load management system comprising:

  • a. central message generator means for transmitting coded radio frequency messages, said messages including a plurality of bits, for each bit there being at least a pair of tones with the upper tone of said pair indicating a first logic state and the lower tone of said pair indicating a second logic state, said messages including a load address indication and a command indication; and

    b. a plurality of load controllers, said load controllers being responsive to messages transmitted by said central message generator means, each of said load controllers being responsive to a specific load address indication, each of said load controllers including means for connecting and disconnecting a load to and from the power generating source in response to command indications from said central message generator means;

    each of said load controllers further including decoder means for translating said radio frequency messages into digital information, said decoder means including;

    (1) input means for detecting a particular phase in the cycle of a tone;

    (2) several window registers, each for accumulating single bit data applied to its input;

    (3) sequencing means for repetitively and sequentially applying the output of said input means to the inputs of a number N of said window registers, said sequencing means including means for sequencing N window registers in a base period of time which is an integer X times the period of said upper tone and an integer Y times the period of said lower tone;

    (4) means for detecting repetition in the pattern of data in said N window registers and for generating a first logic signal where there is repetition in each N/Xth window register, and for generating a second logic signal where there is repetition in each N/Yth window register.

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