Biasing methods and circuits for series connected transistor switches
First Claim
1. In a switching circuit including first and second output terminals for connecting a load therebetween, said first terminal also receiving an operating voltage of E1 volts, a bipolar output transistor having a base electrode, and a main current path connected between said second output terminal and a reference voltage terminal receiving a source of reference voltage, a plurality of first through N control transistors (N=2, 3, 4 . . . ), each having a main current path and a control electrode, each having substantially shorter turn-on and turn-off times than said output transistor, their main current paths connected in series between said second output terminal and the base electrode of said output transistor, the first control transistor having one end of its main current path connected to said second terminal, a method for biasing and operating said N control transistors for turning on and off said output transistor, and for permitting the inverse voltage rating of the main current paths of said N control transistors when turned off to be each be substantially less than E1 volts, comprising the steps of:
- dividing down the voltage V1 at said second terminal into a plurality of bias voltages V.sub.(N-1) ;
applying said bias voltages V.sub.(N-1) to the common connections between the main current paths of said first through N control transistors, respectively, said bias voltages having predetermined levels, respectively, for ensuring that the inverse voltage rating of said first through N control transistors are not exceeded, when these transistors and said bipolar transistor are non-conductive;
andapplying a control signal individually to the control electrodes of said first through N control transistors, for initially turning on said Nth one of these transistors, causing a substantial reduction in the impedance of the main current path of this transistor, thereby permitting base current to flow in said output transistor, which turns on, causing a substantial reduction in the level of impedance of its main current path, in turn causing a substantial reduction in the level of voltage at said second output terminal, and a corresponding reduction in the level of said plurality of bias voltages to levels permitting said first through (N-1)th control transistors to turn on, when the difference in between said control and bias voltages increases to predetermined differences, thereby completing the turn-on cycle for said output transistor.
1 Assignment
0 Petitions
Accused Products
Abstract
In one embodiment of the invention, a switching circuit is provided by connecting the main current paths of a plurality of relatively low voltage transistors in series for switching a relatively high level of voltage, with zener diodes being connected across the main current paths of each one of the transistors, the zeners having a breakdown voltage rating no greater than the inverse voltage rating of their respective transistor, and polarized for breaking down whenever the inverse voltage rating of the transistor is exceeded, the zener diodes also providing a voltage divider circuit for applying appropriate levels of bias voltage to the common connections between the transistors for ensuring the inverse voltage ratings of the transistors are not exceeded at times that the transistors are all turned off, or non-conductive.
81 Citations
37 Claims
-
1. In a switching circuit including first and second output terminals for connecting a load therebetween, said first terminal also receiving an operating voltage of E1 volts, a bipolar output transistor having a base electrode, and a main current path connected between said second output terminal and a reference voltage terminal receiving a source of reference voltage, a plurality of first through N control transistors (N=2, 3, 4 . . . ), each having a main current path and a control electrode, each having substantially shorter turn-on and turn-off times than said output transistor, their main current paths connected in series between said second output terminal and the base electrode of said output transistor, the first control transistor having one end of its main current path connected to said second terminal, a method for biasing and operating said N control transistors for turning on and off said output transistor, and for permitting the inverse voltage rating of the main current paths of said N control transistors when turned off to be each be substantially less than E1 volts, comprising the steps of:
-
dividing down the voltage V1 at said second terminal into a plurality of bias voltages V.sub.(N-1) ; applying said bias voltages V.sub.(N-1) to the common connections between the main current paths of said first through N control transistors, respectively, said bias voltages having predetermined levels, respectively, for ensuring that the inverse voltage rating of said first through N control transistors are not exceeded, when these transistors and said bipolar transistor are non-conductive; and applying a control signal individually to the control electrodes of said first through N control transistors, for initially turning on said Nth one of these transistors, causing a substantial reduction in the impedance of the main current path of this transistor, thereby permitting base current to flow in said output transistor, which turns on, causing a substantial reduction in the level of impedance of its main current path, in turn causing a substantial reduction in the level of voltage at said second output terminal, and a corresponding reduction in the level of said plurality of bias voltages to levels permitting said first through (N-1)th control transistors to turn on, when the difference in between said control and bias voltages increases to predetermined differences, thereby completing the turn-on cycle for said output transistor. - View Dependent Claims (2)
-
-
3. A switching circuit, comprising:
-
first and second output terminals for connecting a load therebetween, said first terminal also receiving an operating voltage of E1 volts; an input terminal for receiving a control signal; a reference voltage terminal for receiving a reference potential of E2 volts; an output transistor having a main current path connected between said second output and reference voltage terminals, and a control electrode, said output transistor being responsive to said control signal for substantially reducing the impedance of its main current path; first through N control transistors, where N is an integer number greater than 1 (N=2, 3, 4 . . . Nth), each one of said first through N control transistors having a main current path and a control electrode, one end of the main current path of said first control transistor being connected to said second terminal, the main current paths of said first through N control transistors being connected in series between said second terminal and the control electrode of said output transistor, said first control transistor having one end of its main current path connected to said second output terminal, said control transistors having substantially faster switching speeds than said output transistor; voltage divider means connected between said second output terminal and said reference voltage terminals, said voltage divider means having a plurality of bias voltage terminals individual connected to the successive common connections between said first through N control transistors, respectively, for applying thereto predetermined bias voltages having levels less than (E1 -E2), thereby permitting said first through N control transistors to have inverse voltage ratings substantially less than (E1 -E2), the sum of the voltage drops across the main current paths of these transistors when turned off being substantially equal to (E1 -E2); and means connected between said input terminal and said control electrodes of said first through N control transistors, for individually applying said control signal to these control electrodes, said switching circuit being responsive to the application of said control signal to said input terminal, for sequentially first turning on the Nth control transistor, for lowering the impedance of its main current path, thereby allowing current to flow into the control electrode of said output transistor, the latter responding by turning on to substantially lower the impedance of its main current path, causing the voltage at said second output terminal to approach the level of said reference voltage, causing the other ones of said N control transistors to turn on, substantially lowering the impedance of their respective main current paths, for completing the turn-on cycle for said output transistor, said N control transistors when turned on providing a negative feedback for current between the main current path and control electrode of said output transistor, thereby improving the transient power capability of said output transistor, and preventing saturation thereof. - View Dependent Claims (4, 5, 6, 7, 8, 9, 10, 11, 12)
-
-
14. A switching circuit responsive to a bilevel input signal and powered by a source of voltage having a predetermined level comprising;
-
a bipolar transistor having a base and an emitter-collector path connected to opposite terminals of the source and to be powered by the voltage source, the bipolar transistor requiring a relatively long time to switch between conducting and cut-off states; a negative feedback circuit between the base and collector, said negative feedback circuit including plural switching transistors having series connected main current paths between the base and collector; means for applying a control signal to control electrodes of the switching transistors so that the main current paths of the switching transistors are activated between a conducting, forward biased state and a cut-off, reverse bias state in response to first and second levels of the control signal, the switching transistors switching between the forward and reverse bias states in a time less than the relatively long time, said switching transistors being connected between the base and collector so that the bipolar transistor emitter collector path is respectively activated to conducting, non-saturated and cut-off states in response to all of the switching transistors being forward biased and fewer than all of the switching transistors being forward biased; each of said switching transistors having an inverse breakdown voltage less than the voltage established by the voltage source across the base and collector while the bipolar transistor is reverse biased to cut-off; means for limiting the voltage across the main conducting path of each switching transistor to a predetermined level while that switching transistor is reverse biased, the number of switching transistors, the voltage across the base and collector of the reverse biased bipolar transistor and the inverse breakdown voltage of the switching transistors being such that the limited predetermined voltage across the main conducting path of each switching transistor is less than the inverse breakdown voltage thereof. - View Dependent Claims (13, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
-
- 28. A circuit for supplying current to a load connected in series between terminals of a voltage source having a predetermined value and the circuit, the circuit comprising plural switching transistors having series conducting paths between terminals of the voltage source for selectively applying current from the voltage source to the load, means for applying a control signal to control electrodes of the switching transistors so that the main current paths of the switching transistors are activated between a conducting, forward biased state and a cut-off, reverse bias state in response to first and second levels of the control signal, said switching transistors being connected to the voltage source and load so that the load is supplied by the voltage source with first and second current levels in response to all of the switching transistors being forward biased and fewer than all of the switching transistors being forward biased, and the inverse breakdown voltage of the switching transistors being such that the limited predetermined voltage across the main conducting path of each switching transistor is less than the inverse breakdown voltage thereof.
Specification