Analog read only memory

• US 4,371,953 A
• Filed: 07/01/1977
• Issued: 02/01/1983
• Est. Priority Date: 12/28/1970
• Status: Expired due to Term

• Current Assignee: Gilbert P. Hyatt
• Original Assignee: Gilbert P. Hyatt
• Inventors: Hyatt, Gilbert P.
• Primary Examiner(s): Hecker, Stuart N.
• Application Number:
  US05/812,285
• Time in Patent Office: 2,041 Days
• Field of Search: 357/24, 365/183, 365/103, 365/104, 365/45
• US Class Current: 365/103
• CPC Class Codes: B60R 16/0373 Voice control in general G10L
• CPC Class Codes: F21V 23/00 Arrangement of electric circuit elements in or on lighting devices characterised by cooling arrangements F21V29/508
• CPC Class Codes: G01S 15/897 using application of holographic techniques
• CPC Class Codes: G01S 15/8977 using special techniques for image reconstruction, e.g. FFT, geometrical transformations, spatial deconvolution, time deconvolution
• CPC Class Codes: G01S 7/52026 Extracting wanted echo signals Doppler systems G01S15/50; Doppler short range imaging systems G01S15/8979
• CPC Class Codes: G02F 1/13318 Circuits comprising a photodetector
• CPC Class Codes: G03F 9/7049 Technique, e.g. interferometric
• CPC Class Codes: G03F 9/7088 Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection
• CPC Class Codes: G04G 99/006 Electronic time-pieces using a microcomputer, e.g. for multi-function clocks
• CPC Class Codes: G05B 19/351 the positional error is used to control continuously the servomotor according to its magnitude
• CPC Class Codes: G05B 19/408 characterised by data handling or data format, e.g. reading, buffering or conversion of data
• CPC Class Codes: G05B 19/4083 Adapting programme, configuration
• CPC Class Codes: G05B 19/4086 Coordinate conversions; Other special calculations
• CPC Class Codes: G05B 19/409 characterised by using manual data input [MDI] or by using control panel, e.g. controlling functions with the panel; characterised by control panel details or by setting parameters G05B19/408, G05B19/4093 take precedence
• CPC Class Codes: G05B 19/4093 characterised by part programming, e.g. entry of geometrical information as taken from a technical drawing, combining this with machining and material information to obtain control information, named part programme, for the NC machine
• CPC Class Codes: G05B 19/414 Structure of the control system, e.g. common controller or multiprocessor systems, interface to servo, programmable interface controller
• CPC Class Codes: G05B 19/4142 characterised by the use of a microprocessor G05B19/4141 takes precedence
• CPC Class Codes: G05B 2219/23094 Debounce key
• CPC Class Codes: G05B 2219/33182 Uart, serial datatransmission, modem
• CPC Class Codes: G05B 2219/34023 Risc processor
• CPC Class Codes: G05B 2219/34098 : Slope fitting, fairing contour, curve fitting, transition
• CPC Class Codes: G05B 2219/34471 : Program memory is inhibited, not accessible as long as power fails
• CPC Class Codes: G05B 2219/34472 : Configure alterable memory as read only, to avoid erasing
• CPC Class Codes: G05B 2219/35262 : Macro instruction, canned cycles, subroutines, subprogram
• CPC Class Codes: G05B 2219/35263 : Using variables, parameters in program, macro, parametrized instruction
• CPC Class Codes: G05B 2219/35373 : Data storage, buffer
• CPC Class Codes: G05B 2219/35381 : Convert in real time input peripheral data to processor data, ouput data format
• CPC Class Codes: G05B 2219/35431 : Interactive
• CPC Class Codes: G05B 2219/35436 : Means, manual input, input reference, hand wheel
• CPC Class Codes: G05B 2219/35453 : Voice announcement, oral, speech input
• CPC Class Codes: G05B 2219/35472 : Mode selection
• CPC Class Codes: G05B 2219/35554 : Mirror, other conversions
• CPC Class Codes: G05B 2219/35588 : Pack, compress data efficiently in memory
• CPC Class Codes: G05B 2219/36152 : Panel
• CPC Class Codes: G05B 2219/36227 : Assist operator to calculate unknown points, contours
• CPC Class Codes: G05B 2219/36333 : Selection from standard forms, shapes, partprograms, enter value for variable
• CPC Class Codes: G05B 2219/36366 : Data, read in, distribution
• CPC Class Codes: G05B 2219/36379 : Read in
• CPC Class Codes: G05B 2219/36395 : Load local computer program from host, data transfer ram to rom, BTR
• CPC Class Codes: G05B 2219/36502 : Ram for variable servo data, rom for fixed servo routine
• CPC Class Codes: G05B 2219/36503 : Adapt program to real coordinates, software orientation
• CPC Class Codes: G05B 2219/36506 : Store in Rom and Ram
• CPC Class Codes: G05B 2219/36546 : Memory protection, protected fields
• CPC Class Codes: G05B 2219/41021 : Variable gain
• CPC Class Codes: G05B 2219/42237 : Pwm pulse width modulation, pulse to position modulation ppm
• CPC Class Codes: G05B 2219/45214 : Gear cutting
• CPC Class Codes: G05B 2219/45215 : Thread cutting
• CPC Class Codes: G05B 2219/49221 : Control of scale
• CPC Class Codes: G05B 2219/50047 : Positioning, indexing
• CPC Class Codes: G05B 2219/50048 : Jogging
• CPC Class Codes: G05B 2219/50083 : Power loss, measures again loss of power
• CPC Class Codes: G05B 2219/50151 : Orient, translate, align workpiece to fit position assumed in program
• CPC Class Codes: G06J 1/00 : Hybrid computing arrangements digitally-programmed analogue computers G06G7/06
• CPC Class Codes: G07G 1/12 : electronically operated digital data processing aspects G06Q20/00
• CPC Class Codes: G10L 19/00 : Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis in musical instruments G10H
• CPC Class Codes: G11C 11/565 : using capacitive charge storage elements
• CPC Class Codes: G11C 13/0033 : Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 13/04 : using optical elements ; using other beam accessed elements, e.g. electron or ion beam
• CPC Class Codes: G11C 16/3418 : Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3431 : Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 19/287 : Organisation of a multiplicity of shift registers
• CPC Class Codes: G11C 19/36 : using multistable semiconductor elements
• CPC Class Codes: G11C 27/00 : Electric analogue stores, e.g. for storing instantaneous values
• CPC Class Codes: G11C 27/024 : using a capacitive memory element G11C27/04 takes precedence
• CPC Class Codes: G11C 27/04 : Shift registers
• CPC Class Codes: G11C 7/1042 : using interleaving techniques, i.e. read-write of one part of the memory while preparing another part
• CPC Class Codes: G11C 7/16 : Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
• CPC Class Codes: Y02P 90/02 : Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

The present invention is directed to a read only memory, wherein the preferred embodiment provides an analog read only memory using charge coupled devices. Fixed but selectable charge packets are used to charge elements in a charge coupled device array; where selectable charging may be provided by selecting resistor values, selecting capacitor values, selectable masking of photo detectors, and other such methods. The accumulated fixed packets of charge are then shifted with a charge coupled device register to provide sequential analog signal outputs. Use of an analog read only memory permits hybrid signal processing such as for voice response. Use of a serial output simplifies the accessing and reduces accessing electronics by eliminating the more complex random access arrangements. The analog read only memory of the present invention has the additional advantage of being a non-volatile memory for preserving stored information when power is removed; where conventional charge coupled device memories are volatile and lose all stored information when power is removed. The analog read only memory of the present invention is particularly useful in systems for generating analog output signals such as voice response systems and filtering systems. Accessing of analog samples from the read only memory can be controlled with a digital processor such as by controlling shifting of the charge couple device shift register and by selecting the desired output information under digital control.

Claims

1. A non-volatile memory system comprising:

means for storing analog information in non-volatile form;

wherein said storing means includes a plurality of electrodes and wherein each electrode of said plurality of electrodes includes electrode area means for storing the analog information in a dimensional characteristic of an electrode related to the analog information stored therein;

means for generating an analog charge signal for each of said plurality of electrodes proportional to the area of the respective electrode; and

charge transfer means for generating an analog output signal in response to the analog charge signal.

2. The system as set forth in claim 1 above, wherein said charge signal generating means includes means for generating the charge signal in response to thermally generated charge from said fixed information storing means.

3. The system as set forth in claim 1 above, further comprising means for generating a charging control signal;

wherein said charge signal generating means includes means for accumulating the charge in response to the charging control signal.

4. The system as set forth in claim 1 above, wherein said charge transfer means includes a CCD shift register for generating the analog output signal as a sequence of output signal components in response to the charge signal for each of said plurality of electrodes generated with said analog charge signal generating means.

5. The system as set forth in claim 1 above, further comprising a stored program data processor for generating processed information in response to a program included in the analog information stored in said storing means.

6. The system as set forth in claim 1 above, further comprising a stored program computer for processing information in response to a program included in the analog output signal from said charge transfer means.

7. The stored program computer as set forth in claim 6 above, further comprising means for converting the analog output signal from said charge transfer means to a digital output signal and means for executing the program in response to the digital output signal to perform said processing of information.

8. The system as set forth in claim 1 above, wherein said charge transfer means includes an analog filter processor for generating the analog output signal in response to filter processing of the analog charge signal from said analog charge signal generating means.

9. The system as set forth in claim 1 above, further comprising an analog to digital converter for generating a digital output signal in response to the analog output signal generated with said charge transfer means.

10. A memory system comprising:

input means for generating an input signal;

storing means for storing analog informatin in non-volatile form;

means for generating an analog charge signal in response to the analog information stored with said storing means;

mode means for generating a plurality of mode signals, said plurality of mode signals including an input mode signal and a stored mode signal;

charge transfer means for storing signals in charge signal form, wherein said charge transfer means includes means for storing the input signal from said input means in response to the input mode signal generated with said mode means and includes means for storing the analog charge signal generated with said analog charge signal generating means in response to the stored mode signal generated with said mode means.

11. A correlator system comprising:

input means for generating an input signal;

a non-volatile memory for storing non-volatile analog information in non-volatile form;

means for generating an analog charge signal in response to the non-volatile analog information stored with said memory; and

correlating means for generating a correlation output signal in response to correlation of the input signal generated with said input means and the analog charge signal generated with said analog charge signal generating means.

12. The system as set forth in claim 11 above, further comprising:

alterable storing means for storing the input signal generated with said input means;

converter means for generating a digital signal in response to the analog charge signal from said analog charge signal generating means; and

hybrid means included in said correlating means for generating the correlation output signal in response to correlation of the input signal generated with said input means and the digital signal from said converter means to generate the correlation output signal in analog signal form.

13. The system as set forth in claim 11 above, wherein said input means includes a stored program digital computer for generating the input signal as a digital input signal and wherein said non-volatile memory is an analog read only memory for storing the non-volatile information in read only memory form;

said system further comprising output means for providing the correlation output signal from said correlating means to said stored program digital computer.

14. A Fourier filter system comprising:

input means for generating a time-related input signal;

storing means for storing analog information in non-volatile form;

means for generating an analog charge signal in response to the non-volatile analog information stored with said storing means; and

Fourier filter means for providing a frequency related filtered output signal in response to the analog charge signal generated with said analog charge signal generating means in response to the time-related input signal generated with said input means.

15. The system as set forth in claim 14 above, wherein the time-related input signal is a digital time-related input signal and wherein said Fourier filter means includes means for providing a digital output signal in response to the analog charge signal from said analog charge signal generating means and in response to the digital time-related input signal from said input means.

16. A memory system comprising:

means for storing non-volatile analog information in the form of different dimensional electrode areas;

means for providing an analog output signal, proportional to electrode area in response to the non-volatile analog information stored with said storing means; and

means for providing a digital output signal in response to the analog output signal provided with said analog output signal providing means.

17. The system as set forth in claim 16 above, wherein said storing means includes an analog read only memory for storing a computer program, wherein the analog output signal from said analog output signal providing means includes computer program information, and wherein said digital output signal from said digital output signal providing means includes computer program information;

said system further comprising a stored program digital computer for processing digital information in response to the computer program information-related digital output signal.

18. The system as set forth in claim 16 above, wherein said storing means is a charge storing means for storing charge proportional to electrode area information.

19. The system as set forth in claim 16 above, wherein said output signal providing means includes correlator means for providing the analog output signal as a correlation analog output signal.

20. The system as set forth in claim 16 above, further comprising transform processor means for generating transform processed information in response to the digital output signal.

21. An analog correlator system comprising:

input means for generating an input signal;

storing means for storing fixed analog reference information;

means for providing an analog reference signal in response to the fixed analog reference information stored with said storing means;

correlation means for correlating the analog reference signal provided by said analog reference signal providing means with the input signal generated with said input means; and

means for providing digital correlation information in response to the correlation with said correlation means.

22. The system as set forth in claim 21 above, wherein said input means includes a stored program digital computer for generating the input signal as a digital input signal and wherein said storing means is an analog read only memory for storing the fixed analog reference information in read only memory form;

said system further comprising output means for providing the digital correlation information from said digital correlation information providing means to said stored program digital computer.

23. A CTD read only memory system comprising:

analog CTD storing means for storing a computer program in analog read only information form;

analog CTD output means for generating an analog program-related output signal in response to the computer program analog information stored in said analog storing means;

converter means for generating a digital program-related output signal in response to the analog program-related output signal generated with said analog CTD output means; and

a stored program computer for processing digital information in response to the digital program-related output signal generated with said converter means.

24. The system as set forth in claim 23 above, wherein said analog storing means includes means for storing the computer program in the form of electrode dimensions.

25. The system as set forth in claim 23 above, wherein said analog storing means includes means for storing analog operand information;

said system further comprising correlation processor means for generating a correlation output signal in response to the analog operand information stored in said analog storing means, wherein said computer includes means for processing the correlation output signal generated with said correlation processor in response to the digital program-related output signal generated with said converter means.

26. The system as set forth in claim 23 above, wherein said analog read only information stored in said analog storing means is stored in electrode area form.

27. The system as set forth in claim 23 above, wherein said stored program computer includes an alterable CCD storing means for storing alterable information in response to digital information processed with said stored program computer.