×

Unidirectional data transmission system

  • US 4,420,833 A
  • Filed: 09/22/1980
  • Issued: 12/13/1983
  • Est. Priority Date: 09/27/1979
  • Status: Expired due to Term
First Claim
Patent Images

1. A system for broadcasting data in the form of data packets sent from a transmitting station;

  • said data packets including numerical data received from at least one of a plurality of incoming paths and combining such data into a format comprising a prefix containing synchronization and path identification code signals, said packet also including a format signal indicating the length of the successive data words which follow the prefix;

    said system comprising;

    a transmitting station having a plurality coupling means, one coupling means being individually associated with each of said incoming paths;

    common governing means for controlling all of said plurality of coupling means, each of said coupling means having an individual input circuit menas coupled to receive data over the incoming path which is individually associated with the coupling device;

    multiplexing means for preparing said data packets for transmission;

    data memory means individually associated with each of said input circuit means for driving said multiplexing means under control of said common governing means;

    counter means operated at a pre-determined bit clock rate for retaining a memory of the amount of data stored in said data memory;

    means responsive to at least a partial filling of said data memory means as indicated by said counter means for inhibiting the input circuit means associated therewith;

    means responsive to said inhibiting of said input circuit means for connecting said data memory means to the multiplexing means and emptying the data memory means, and for resetting the counter means, the inhibition being removed on the emptying of said memory means;

    a register means having an adjustable maximum capacity for causing said inhibition order to be given when the count of said data again reaches a pre-determined value; and

    a small capacity buffer memory means interposed between said input circuit means and its individually associated data memory means for smoothing the flow of said data into said data memory means, the reading of the data into and out of the buffer memory being governed by a programmer means associated with said coupling means.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×