Condensate drain valves

• US 4,505,427 A
• Filed: 10/06/1983
• Issued: 03/19/1985
• Est. Priority Date: 10/12/1982
• Status: Expired due to Fees

• Current Assignee: Loomhurst Limited
• Original Assignee: 501 Loomhurst Limited
• Inventors: Bridges, Robert E.
• Primary Examiner(s): Wayner, William E.
• Application Number:
  US06/539,571
• Time in Patent Office: 530 Days
• Field of Search: 236/56-60, 236/54, 236/53, 137/187, 137/204
• US Class Current: 236/64
• CPC Class Codes: F16K 31/02 electric F16K31/004 takes precedence; magnetic
• CPC Class Codes: F16T 1/00 Steam traps or like apparatus for draining-off liquids from enclosures predominantly containing gases or vapours, e.g. gas lines, steam lines, containers
• CPC Class Codes: Y10T 137/3052 Level responsive
• CPC Class Codes: Y10T 137/3105 Self-emptying

Abstract

Solenoid operated condensate drain valve arrangements for steam systems are described having the following features:

(a) powered by electromotive force obtained by the Seebeck effect;

(b) where electrical sensing probe means control operation of the arrangement, the provision of thermal switch means overriding the action of the probe means and enabling air to escape from the system under start-up conditions;

(c) provision of a monitoring circuit that allows escape of trapped steam which may be having a steam locking effect;

(d) provision of a monitoring circuit that gives a measure of automatic drainage in the event of some failure in the drain valve arrangement.

Claims

1. An electronically operated condensate drain valve arrangement for draining condensate from a steam system, the arrangement comprising a condensate drain valve, an electronic circuit for controlling operation of the valve, and a sensor for insertion in the fluid transfer system to trigger the electronic circuit for closing the valve when the sensor senses that condensate level is below the sensor, the sensor also serving to sense when there is condensate to be discharged at a level about at least part of the sensor and to thereupon trigger the circuit to open the valve, the electronic circuit including a monitoring circuit that monitors the lengths of the intervals between successive valve opening operations and that triggers the electronic circuit so that the valve opens for a predetermined time and then closes again upon the interval between successive valve opening operations exceeding a predetermined maximum.

2. A valve arrangement as claimed in claim 1, wherein the electronic circuit includes a first integrated circuit which serves to compare the signal from the sensor with an internal resistance of the circuit;

a second integrated circuit that is a solid state timer;

an opto-isolator; and

a triac; and

wherein the valve is a solenoid-operated valve;

the sensor receiving an AC signal in operation of the arrangement and the electronic circuit operating such that if there is no condensate at the level of the sensor there is an oscillating output from the first integated circuit whereas if the sensor is covered by condensate there is a steady positive output from the first integrated circuit;

the second integrated circuit being connected to receive the output from the first integrated circuit so as to initiate a timing cycle upon receiving said oscillating output, an output from this second integrated circuit being positive during this and any subsequent timing cycle and in this condition the valve solenoid being de-energised, and this output changing to zero at the conclusion of the timing cycle to switch the solenoid to its energised condition, the monitoring circuit being connected between the second integrated circuit and means for switching the solenoid to its energised condition, and serving for monitoring the lengths between successive valve opening operations, and for triggering the electronic circuit to open the valve for a predetermined time if the interval between successive valve opening operations exceeds a predetermined time.

3. A valve arrangement as claimed in claim 2, wherein the monitoring circuit includes a further integrated circuit that is a solid state timer, and an arrangement of NAND gates, the output from this further integrated circuit being inverted by a first of the NAND gates and NANDed by a second of the NAND gates with the output from the second integrated circuit, this output having first been fed through a resistor/capacitor filter and the filtered output of the second integrated circuit being also fed to a reset pin of the further integrated circuit, whereby when the output of the second integrated circuit is taken to zero (valve open condition) the further integrated circuit is reset and has an output that is positive and which is inverted by third and fourth of the NAND gates so that associated transistors are OFF, whereas when the output of the second integrated circuit goes to positive (valve closed condition) the further integrated circuit is enabled in an astable mode, thereby simulating a valve opening condition for a predetermined period at predetermined intervals by switching said associated transistors to ON should the valve not otherwise open as a result of the output of the second integrated circuit going to zero, the intervals between successive valve openings as determined by the monitoring circuit being longer than minimum intervals as determined by the remainder of the electronic circuit as a whole so that the effect of the monitoring circuit is to give a valve opening effect in the event that the interval between successive valve opening operations brought about by the remainder of the electronic circuit exceeds a predetermined maximum.