Transmitter and receiver for controlling remote elements

• US 4,535,333 A
• Filed: 09/23/1982
• Issued: 08/13/1985
• Est. Priority Date: 09/23/1982
• Status: Expired due to Term

• Current Assignee: The Chamberlain Group, Inc. (The Chamberlain Group LLC)
• Original Assignee: Chamberlain Manufacturing Corporation (General Dynamics Corporation)
• Inventors: Twardowski, Joseph W.
• Primary Examiner(s): YUSKO, DONALD
• Application Number:
  US06/422,452
• Time in Patent Office: 1,055 Days
• Field of Search: 340/825.69, 340/825.22, 340/825.31, 340/696, 340/825.72, 455/151
• US Class Current: 340/5.25
• CPC Class Codes: G07C 9/00817 where the code of the lock can be programmed
• CPC Class Codes: G07C 9/00857 where the code of the data carrier can be programmed
• CPC Class Codes: G08C 19/28 using pulse code

Abstract

Transmitters and receivers for controlling remote elements which use a synchronous serial transmission format and which allows changes in coding to be automatically made between the receiver and transmitter and wherein the code is stored in memories of the transmitter and receiver and wherein the receiver can generate and transmit a new code with a light emitting diode so as to change the code in the transmitter. The transmitter and the receiver use micro-computers which are suitably programmed and include non-volatile memories.

Claims

1. Apparatus for controlling a receiver with a remote radio frequency transmitter comprising a first micro-processor and a first memory means in said receiver for storing at least one address code, non-radio frequency transmitting means in said receiver, switch means for energizing said non-radio frequency transmitting means to transmit an address code, a non-radio frequency receiving means in said transmitter for receiving said address code, a second micro-processor and second memory means in said transmitter for storing said address code, radio frequency radiating means in said transmitter for radiating said address code, receiving means in said receiver for receiving said radio frequency radiated address code, said first micro-processor in said receiver comparing the received address code with the address code stored in said first memory, an output circuit energized by said comparing means when said addresses are the same, wherein said first memory means comprises a non-volatile memory and a programmable read only memory and said second memory means comprises a non-volatile memory and a programmable read only memory.

2. Apparatus according to claim 1 wherein said first micro-processor is programmed to operate as a pseudo random number generator to generate a plurality of different address codes to allow the address codes in said transmitter and receiver to be changed.

3. Apparatus according to claim 2 wherein said non-radio frequency transmitting means is a light radiator.

4. Apparatus according to claim 3 wherein said non-radio frequency receiving means in said transmitter is a light detector.

5. Apparatus according to claim 2 wherein said non-radio frequency transmitting means in said receiver is an electrical conductor.

6. Apparatus according to claim 4 wherein said address code comprises a serial binary code of pulse length modulated form of a plurality of word lengths.

7. Apparatus according to claim 6 wherein said address code contains a binary check block for indicating whether a correct signal has been received.

8. Apparatus according to claim 6 wherein said address code contains a binary synchronizing block for synchronizing the transmitter and receiver.

9. Apparatus according to claim 6 wherein said address code contains a terminating block.

10. Apparatus according to claim 6 wherein said address code is repeated and each address code is separated by a blanking period.

11. Apparatus according to claim 2 including a first octal latch in said receiver which is connected to said first micro-processor.

12. Apparatus according to claim 2 including a second octal latch in said transmitter.