Watchdog timer

  • US 4,566,111 A
  • Filed: 11/02/1983
  • Issued: 01/21/1986
  • Est. Priority Date: 11/04/1982
  • Status: Expired due to Term
First Claim
Patent Images

1. A watchdog timer comprising;

  • a register (2) for presetting predetermined DATA upon receipt of a writing signal (WT),a counter (4) which is incremented by a clock pulse (φ

    ),a comparator (3) which compares contents of said register (2) with contents of said counter and providing a coincidence output signal when two contents coincide with each other,a first flip-flop (F1) for storing said coincidence output signal for one period of said clock pulse φ

    ,a second flip-flop (F2) for storing said coincidence output signal upon receipt of said clock pulse φ

    ,a third flip-flop (F3) for storing output of said second flip-flop F2 upon receipt of said clock pulse φ

    ,an AND circuit (G1) for providing logical product of a reverse output Q1 of said first flip-flop F1 and said writing signal(WT) , andan OR circuit (G2) for receiving an output of said third flip-flop F3 and an output of said AND circuit (G1) and producing an alarm signal NG which indicates an error of a computer to be monitored.

View all claims
    ×
    ×

    Thank you for your feedback

    ×
    ×