System for limiting access to non-volatile memory in electronic postage meters

• US 4,578,774 A
• Filed: 07/18/1983
• Issued: 03/25/1986
• Est. Priority Date: 07/18/1983
• Status: Expired due to Term

• Current Assignee: Pitney Bowes Incorporated (Böwe Systec AG)
• Original Assignee: Pitney Bowes Incorporated (Böwe Systec AG)
• Inventors: Muller, Arno
• Primary Examiner(s): Thomas, James D.
• Assistant Examiner(s): LEE, THOMAS C
• Application Number:
  US06/514,726
• Time in Patent Office: 981 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 364/187, 364/464, 364/466, 371/14, 371/62, 371/66, 365/195, 365/227, 365/228, 340/799, 340/814
• US Class Current: 713/324
• CPC Class Codes: G07B 17/00314 Communication within apparatus, personal computer [PC] system, or server, e.g. between printhead and central unit in a franking machine
• CPC Class Codes: G07B 17/00362 Calculation or computing within apparatus, e.g. calculation of postage value
• CPC Class Codes: G07B 2017/00338 Error detection or handling
• CPC Class Codes: G07B 2017/00346 Power handling, e.g. power-down routine
• CPC Class Codes: G07B 2017/00403 Memory zones protected from unauthorized reading or writing
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/20 Initialising; Data preset; Chip identification
• CPC Class Codes: G11C 16/225 Preventing erasure, programming or reading when power supply voltages are outside the required ranges
• CPC Class Codes: G11C 16/30 Power supply circuits

Abstract

A method and associated apparatus for limiting the erasing and writing of data in the non-volatile memory (NVM) of an electronic postage meter operated under microcomputer control to predetermined periods of time after the power up and during the power down cycles of the meter, comprising the steps and associated apparatus for providing an output power signal in response to the establishment of a power up voltage condition, generating an output pulse in response to the presence of the output power signal, presetting the width of the output pulse to provide sufficient time to erase the desired data words from the NVM, applying a bias enable signal to an NVM enable terminal during the duration of the output pulse, enabling the remaining terminals of the NVM during the duration of the output pulse to allow the erasure of data from the NVM, removing the output power signal in response to a power down voltage condition, interrupting the operation of the microcomputer in response to the removal of the output power signal to ready the microcomputer for writing data in NVM, applying the bias enable signal to the NVM enable terminal at the inception of the power down cycle, enabling the remaining terminals of the NVM to allow the writing of data into the NVM during power down for a predetermined time period, and biasing the terminals of the NVM during normal postage meter operation to preclude writing of data into and erasure of data from the NVM.

Claims

1. A method for limiting an erasing of data from and a writing of data into a non-volatile memory (NVM) of an electronic postage meter operated under control of a microcomputer to predetermined periods of time after a power up cycle and during a power down cycle of the meter the NVM having data therein after the power up cycle and during the power down cycle, the NVM having a enable terminal and a plurality of remaining terminals, comprising the steps of:

providing an an output power signal in response to an establishment of a power up voltage condition;

generating an output pulse in response to the output power signal;

presetting the output pulse to a width that will provide sufficient time to erase desired data from the NVM;

applying a bias enable signal to the NVM enable terminal during the width of the output pulse;

enabling the remaining terminals of the NVM during the width of the output pulse to allow for the erasing of the desired data from the NVM;

removing the output power signal in response to a power down voltage condition;

interrupting the microcomputer control of the electronic postage meter in response to the removal of the output power signal to ready the microcomputer for writing desired data into the NVM;

applying the bias enable signal to the NVM enable terminal at a begining portion of the power down cycle for a predetermined time period;

enabling the plurality of remaining terminals of the NVM to allow the writing of the desired data into the NVM during power down for said predetermined time period; and

biasing the plurality of remaining terminals of the NVM during normal postage meter operation to preclude writing of data into and erasing of data from the NVM.

2. The method recited in claim 1, wherein:

the NVM terminals are enabled after power up to establish a NVM word erase condition for a period of time coincident with the duration of the output pulse.

3. The method recited in claim 1, wherein:

the NVM terminals are enabled during power down to establish a NVM write condition for a period of time as determined by the microcomputer to enable all the desired data to be written into NVM.

4. The method recited in claim 1, including the step of:

transmitting a first interrupt signal to the microcomputer in the presence of the output power signal to advise the microcomputer that the power up cycle is completed.

5. The method recited in claim 1, including the step of:

transmitting a second interrupt signal to the microcomputer to advise the microcomputer that the power down cycle has commenced.

6. The method recited in claim 1, including the step of:

transmitting the output pulse to the microcomputer to activate the microcomputer for erasing the desired data in the NVM.

7. The method recited in claim 1, including the step of:

providing a feedback signal which prevents resetting of the microcomputer after completion of the power up cycle, during normal operation and during the beginning portion of the power down cycle until all the desired data has been written into NVM.

8. The method recited in claim 1, including the step of:

gating the output signals from the microcomputer to preclude the erasure of data from the NVM in the absence of the output pulse.

9. The method recited in claim 1, including the step of:

gating the output signals from the microcomputer to preclude writing of data in the NVM after ap predetermined period of time as determined by the microcomputer.

10. The method recited in claim 1, including the step of:

resetting the microcomputer after all the desired data has been written into the NVM.

11. A method for limiting an erasing of data from and a writing of data into a non-volatile memory (NVM) of an electronic postage meter operated under control of a microcomputer to predetermined periods of time after a power up cycle and during a power down cycle of the meter the NVM having data therein after the power up cycle and during the power down cycle, the NVM having an enable terminal and a plurality of remaining terminals, comprising the steps of:

providing an output power signal in response to an establishment of a power up voltage condition;

generating an output pulse in response to the output power signal;

presetting the output pulse to a width that will provide sufficient time to erase desired data from the NVM;

applying a bias enable signal to the NVM enable terminal during the width of the output pulse;

enabling the remaining terminals of the NVM during the width of the output pulse to allow the erasing of the desired data from the NVM;

removing the output power signal in response to a power down voltage condition;

interrupting microcomputer control of the electronic postage meter in response to the removal of the output power signal to ready the microcomputer for writing desired data in NVM;

applying the bias enable signal to the NVM enable terminal at a beginning of the power down cycle for a predetermined time period;

enabling the remaining terminals of the NVM to allow the writing of the desired data into the NVM during power down for said predetermined time period;

biasing the remaining terminals of the NVM during normal postage meter operation to preclude the writing of data into and erasure of data from the NVM;

the NVM terminals are enabled after power up to establish an NVM word erase condition for a period of time coincident with the duration of the output pulse;

the NVM terminals are enabled during power down to establish an NVM write condition for a period of time as determined by the microcomputer to enable all the desired data to be written into NVM;

transmitting a first interrupt signal to the microcomputer in the presence of the output power signal to advise the microcomputer that the power up cycle is completed;

transmitting a second interrupt signal to the microcomputer to advise the microcomputer that the power down cycle has commenced;

transmitting the output pulse to the microcomputer to activate the microcomputer for erasing the desired data in the NVM;

providing a feedback signal which prevents resetting of the microcomputer after completion of the power up cycle, during normal operation and during the beginning portion of the power cycle until all the desired data has been written into NVM;

gating the output signals from the microcomputer to preclude erasure of data from the NVM in the absence of the output pulse; and

gating the output signals from the microcomputer to preclude writing of data in the NVM after a predetermined period of time as determined by the microcomputer.

12. A system for limiting an erasing of data from and a writing of data into a non-volatile memory (NVM) of an electronic postage meter to predetermined periods of time after a power up cycle and during a power down cycle of the meter the NVM having data therein after the power up cycle and during the power down cycle, the NVM having an enable terminal and a plurality of terminals, comprising:

signal means for providing an output signal in response to a power up voltage condition;

pulse supplying means electrically connected to said signal means for providing an output pulse having a predetermined width in accordance with presence of an output signal from said signal means;

a microcomputer means electrically connected to said pulse supplying means and said signal means for receiving signals therefrom;

gate means interposed between said microcomputer means and the non-voltaile memory for enabling the non-volatile memory upon power up of the electronic postage meter when the output pulse is provided from said pulse supplying means to allow desired data to be erased from the non-volatile memory by said microcomputer and for enabling the non-volatile memory during power down of the electronic postage meter when the output signal is removed from said signal means to allow desired data to be written into the non-volatile memory for a predetermined period of time accordance with output signal provided from said microcomputer.

13. The system recited in claim 12, wherein:

said signal means includes an LED and a phototransistor responding thereto.

14. The system recited in claim 12, wherein:

said pulse supplying means includes a one-shot multivibrator and RC circuit electrically coupled thereto to establish the pulse width of the output pulse.

15. The system recited in claim 12, including:

transistor switching means responding to the output pulse for applying a bias voltage to the NVM for enabling the erasure of the desired data therefrom during the duration of the output pulse.

16. The system recited in claim 15, including:

additional gate means interposed between said pulse supplying means and said gate means for activating said gate means in response to the output pulse.

17. The system recited in claim 12. including:

circuit means for preventing a reset signal from being applied to said microcomputer upon receipt of the power up output signal by said micrcomputer.

18. The system recited in claim 12, including:

bias means for biasing the remaining terminals of the NVM during normal postage meter operation to preclude writing and erasing of data therein.

19. The system recited in claim 12, including:

interrupt means electrically coupled to said signal means and said microcomputer for supplying an interrupt signal to said microcomputer in response to the power up output signal being provided from said signal means.

20. The system recited in claim 12, including:

signal inverting means coupled to said signal means for supplying a signal to activate said additional gate means in the absence of the power up output signal from said signal means indicating a beginning of the power down cyle.

21. A system for limiting access to a non-volatile memory (NVM) of an electronic postage meter for an erasing and a writing data therein to predetermined periods of time after a power up cycle and during a power down cycle of the meter the NVM having data therein after the power up cycle and during the power down cycle, the NVM having an enable terminal and a plurality of remaining terminals, comprising:

signal means for providing an output signal in response to a power up voltage condition;

pulse supplying means electrically connected to said signal means for providing an output pulse having a predetermined width in accordance with presence of an output signal from said signal means, said pusle supplying means including a one-shot multivibrator and circuit means electrically coupled to thereto establish the pulse width of the output pulse;

a microcomputer means electrically connected to said pulse supplying means and said signal means for receiving signals therefrom;

gate means interposed between said microcomputer means and the non-volatile memory for enabling the non-volatile memory upon power up of the electronic postage meter when the output pulse is provided from said pulse supplying means to allow desired data to be erased from the non-volatile memory by said microcomputer and for enabling the non-volatile memory during power down of the electronic postage meter when an output signal is removed from said signal means to allow desired data to be written into the non-volatile memory for a predetermined period of time in accordance with the output signal being provided from said microcomputer;

switching means responding to the output pulse for applying a bias voltage to the NVM for enabling the erasing of the desired data therefrom during the width of the output pulse;

additional gate means interposed between said pulse supplying means and said gate means for activating said gate means in response to the output pulse;

means for biasing the remaining terminals of the NVM during the normal postage meter operation to preclude the writing and erasing of data therein;

interrupt means electrically coupled to said signal means and said micromputer for supplying an interrupt signal to said microcomputer in response to the power up output signal being removed from said signal means; and

means coupled to said signal means for supplying a signal to activate said additional gate means when the power up output signal is removed from said signal means indicating a beginning of the power down cycle.