Method of driving liquid crystal display device

• US 4,649,383 A
• Filed: 12/29/1983
• Issued: 03/10/1987
• Est. Priority Date: 12/29/1982
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Takeda, Makoto, Funada, Fumiaki, Nonomura, Keisaku
• Primary Examiner(s): Curtis, Marshall M.
• Assistant Examiner(s): Kovalick, Vincent P.
• Application Number:
  US06/566,795
• Time in Patent Office: 1,167 Days
• Field of Search: 340/718, 340/719, 340/784, 340/805, 340/713, 350/332, 350/333
• US Class Current: 345/92
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

A method of driving a matrix type liquid crystal display device which compensates for the distortion of scanning signal and data waveforms caused by resistance and capacitance of the display device electrodes. In one embodiment of this method the timing of the scanning signal is advanced with respect to the timing of the data switching signal by a time determined by the resistor-capacitor time constant of the electrodes and display elements. In another embodiment of this method the switching timing of the scanning signal is delayed with respect to the leading edge of the data signal and the switching timing of the scanning signal is advanced with respect to the trailing edge of the data signal. The delay of the leading edge and the advance of the trailing edge are determined by the resistor-capacitor time constant of the electrode and display elements and the capacitance of the display element, respectively.

Claims

1. A method of driving a matrix type liquid crystal display device including a liquid crystal picture forming element at the intersection of each line electrode and column electrode and where each liquid crystal element is provided with a thin film transistor connected to the row electrode and the column electrode, comprising the steps of:

(a) applying a scanning signal pulse to the line electrode; and

(b) applying a data signal pulse to the column electrode where the scanning signal pulse is advanced in time with respect to the data signal pulse, the advancement in time of the scanning signal pulse being determined in accordance with a resistor-capacitor time constant associated with a capacitance formed by the liquid crystal element and the line electrode and a resistance of the line electrode.

2. A method as recited in claim 1, wherein a trailing edge timing of the scanning signal pulse is advanced in time with respect to the data signal pulse.

3. A method as described in claim 2, wherein a pulse width of the scanning signal pulse is equal to a data switching interval between consecutive data signal pulses.

4. A method as recited in claim 2, wherein a leading edge timing of the scanning signal pulse is delayed in time with respect to a switching timing of the data signal pulse.

5. A method as recited in claim 1, wherein the advancement of the scanning signal pulse is determined in accordance with a resistor-capacitor time constant associated with a capacitance formed by the liquid crystal element and the line electrode and a resistance of the line electrode.

6. A method of driving a matrix type liquid crystal display device including a liquid crystal picture forming element at the intersection of each line electrode and column electrode and where each liquid crystal element is provided with a thin film transistor connected to the line electrode and the column electrode, comprising the steps of:

(a) applying a scanning signal pulse having a leading edge and a trailing edge to the line electrode; and

(b) applying a data signal pulse to the column electrode, where the switching timing of the scanning signal pulse is delayed in time with respect to the leading edge timing of the data signal pulse, the delay in timing being determined in accordance with a resistor-capacitor time constant associated with a capacitance formed by the liquid crystal element and the line electrode and a resistance of the line electrode.

7. A method as recited in claim 6, wherein the scanning signal pulse trailing edge timing is advanced in time with respect to the switching timing of the data signal pulse.

8. A method as recited in claim 6, wherein the advancement of scanning signal pulse trailing edge timing is determined in accordance with a resistor-capacitor time constant associated with a capacitance formed by the liquid crystal element and the line electrode and a resistance of the line electrode.

9. A method as recited in claim 6, wherein the advancement of the scanning signal pulse trailing edge timing is determined in accordance with a charging rate associated with a capacitance formed by the liquid crystal element.

10. A method as recited in claim 6, wherein the delay of the scanning signal pulse leading edge timing is determined in accordance with a resistor-capacitor time constant associated with a capacitance formed by the liquid crystal element and the line electrode and a resistance of the line electrode and a rate of charging associated with a capacitance formed by the liquid crystal element and a resistance of the thin film transistor.