Aircraft flight data recorder data acquisition system
First Claim
1. A data acquistion system for an aircraft flight data recorder responsive to a central processor unit (CPU) for processing a plurality of input signals to provide a digitally encoded signal representative of a selected set of input signals each time the CPU provides a simple command signal, said digitally encoded signal being used by said CPU for generation of recorded flight data information, said data acquisition system comprising:
- multiplexing means for outputting said selected set of said input signals, each selected input signal set being output responsive to a corresponding address command signal;
logic means responsive to said single command from said CPU for producing each address command signal; and
processing means for processing each signal in a selected signal set to supply said digitally encoded signal representative of said selected set of input signals.
2 Assignments
0 Petitions
Accused Products
Abstract
A data acquisition system for use in an aircraft flight data recorder receives multiple analog and discrete signals representative of various aircraft parameters. A single address command from the flight data recorder central processing unit (CPU) causes a first multiplexer to select a set of analog signals. Each selected analog signal is amplified by a gain factor under CPU control and passed to track-and-hold circuitry which holds a level of the amplified analog signal upon receipt of a suitable command. The held analog signal levels are passed to a second multiplexer which also receives a set of discrete signals selected by a third multiplexer in response to a CPU address command. A control sequencer sequentially passes each signal at the input of the second multiplexer through an analog-to-digital converter, with the resultant digital signal being loaded into memory. After either all the selected and processed analog signals or the selected discrete signals have been analog-to-digital converted and stored in memory, the control sequencer issues an interrupt signal to the CPU.
141 Citations
30 Claims
-
1. A data acquistion system for an aircraft flight data recorder responsive to a central processor unit (CPU) for processing a plurality of input signals to provide a digitally encoded signal representative of a selected set of input signals each time the CPU provides a simple command signal, said digitally encoded signal being used by said CPU for generation of recorded flight data information, said data acquisition system comprising:
-
multiplexing means for outputting said selected set of said input signals, each selected input signal set being output responsive to a corresponding address command signal; logic means responsive to said single command from said CPU for producing each address command signal; and processing means for processing each signal in a selected signal set to supply said digitally encoded signal representative of said selected set of input signals. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A data acquisition system for an aircraft flight data recorder of the type that selectively records flight data information, said flight data acquisition system being responsive to a central processor unit (CPU) for selectively processing multiple input signals and supplying to said CPU for utilization in selective recording of flight data information a digital signal respresentative of a selected set of said input signals, said data acquisition system comprising:
-
multiplexing means responsive to applied address command signals for outputting selected sets of said input signals; signal level control means for predeterminedly controlling the level of each signal in a selected signal set, said signal level control means including gain controlled amplifier means responsive to applied gain control command signals for amplifying each signal in a signal set by a predetermined gain factor; means responsive to an applied hold command signal to hold the instantaneous level of each amplified signal in a signal set; analog-to-digital converter means for converting the held signal levels into said digital signal for utilization by said CPU; and controller means for predeterminedly coupling each held signal level to the input of said analog-to-digital converter means. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
-
-
17. A data acquisition system for an aircraft flight data recorder having a plurality of analog input signals and a plurality of discrete input signals and being responsive to a central processor unit (CPU) for selectively processing said analog and discrete input signals into digital signals for transmission to said CPU in response to a command signal supplied by said CPU, the data acquisition system comprising:
-
first multiplexing means responsive to a first address command signal for outputting a selected set of said analog signals; processing means for supplying a set of signal levels representative of the value of each signal in a selected signal set of said analog signals at a predetermined sampling time; second multiplexing means responsive to a second address command signal for outputting a selected set of said discrete signals; third multiplexing means responsive to a control sequence signal for selectively outputting one of said first multiplexing means processed signal set and said second multiplexing means output signal set; analog-to-digital converter means for converting each signal out of said third multiplexing means to a digital signal; digital memory means for storing each analog-to-digital converter means produced signal; control sequencer means for producing control sequence signals to sequentially analog-to-digital convert the output signals from said third multiplexing means, said control sequencer means further providing an interrupt signal to said CPU responsive to said digital memory means having stored each analog-to-digital converted output from said third multiplexer means; and logic means for supplying at least one of said first and second address command signals in response to each said command signal applied by said CPU. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
-
-
25. A data acquisition system for an aircraft flight data recorder responsive to a central processor unit (CPU) for processing a plurality of input signals to provide a digitally encoded signal representative of a selected set of input signals for utilization by the CPU each time the CPU provides a single command signal, said data acquisition system comprising:
-
multiplexing means for outputting said selected set of said input signals in response to an applied address command signal; logic means responsive to said single command signal from said CPU for applying said address command signal to said multiplexing means; processing means for processing each signal in a selected signal set to provide said digitally encoded word representative of said selected set of input signals, said processing means including; (a) gain controlled amplifier means responsive to an applied gain control command signal for amplifying each signal in a selected signal set by a predetermined gain factor; (b) track-and-hold circuit means for tracking the values of each amplified signal in a selected signal set and, in response to an applied hold command signal, holding the instantaneous value of each amplified signal; (c) analog-to-digital converter means for converting each signal at its input to a corresponding digital signal at its output; (d) controller means for coupling the instantaneous value of each signal in the selected signal set to the input of said analog-to-digital converter means; and (e) means for supplying said corresponding signals supplied by said analog-to-digital converter means as said digitally encoded signal representative of said selected set of input signals. - View Dependent Claims (26, 27, 28, 29, 30)
-
Specification