Battery tester

• US 4,659,994 A
• Filed: 08/12/1985
• Issued: 04/21/1987
• Est. Priority Date: 08/12/1985
• Status: Expired due to Fees

• Current Assignee: the united states of america as represented by the secretary of the navy
• Original Assignee: the united states of america as represented by the secretary of the navy
• Inventors: Poljak, Mark D
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): Mueller, Robert W.
• Application Number:
  US06/764,687
• Time in Patent Office: 617 Days
• Field of Search: 324/426, 324/427, 324/429, 324/434, 320/48, 340/636
• US Class Current: 324/426
• CPC Class Codes: G01R 31/3648 comprising digital calculation means, e.g. for performing an algorithm
• CPC Class Codes: G01R 31/38 Primary cells, i.e. not rechargeable
• CPC Class Codes: G01R 31/385 Arrangements for measuring battery or accumulator variables for monitoring G01R31/382
• CPC Class Codes: Y10S 320/18 Indicator or display

Abstract

An improved battery tester for determining the acceptability of a Lithium lfur Dioxide (LiSO₂) storage battery at a given temperature and with one or more cells therein. The tester is generally made up of a first comparison circuit having a series of series interconnected components, namely a comparator, first and second flip-flops, and an AND gate. A first resistor is parallel connected to the first comparison circuit. A second comparison circuit is also parallel connected to the first comparison circuit and is generally made up of a series of series interconnected components, namely a second resistor, a capacitor, a buffer, and a second comparator. A first switch is connected to the first resistor and a second switch is parallel connected to the second comparison circuit between the capacitor and the buffer. A logic control arrangement controls the operation of both switches, both comparators, and both flip-flops for testing a battery as to its start-up voltage and performance voltage characteristics all in a relatively short time period. In another embodiment of the tester, it is provided with an analog-to-digital converter, a memory and a sensor arrangement for enhancing the versatility and reliability of the tester in determining the acceptability of a LiSO₂ battery. By virtue of the tester being of generally solid-state construction, it requires minimal power usage and can be readily incorporated into battery-powered equipment for enabling testing of a battery at any location where the equipment is to be used.

Claims

1. A battery tester for determining the acceptability of a Lithium Sulfur Dioxide (LiSO₂) battery having one or more cells therein, said tester comprising:

first and second comparison circuit means and logic means,

the first comparison circuit means having a first series of series interconnected components, namely;

first comparator means, first and second flip-flop means, and AND gate means, a forward bias input of the first comparator means being connected to a positive battery terminal means, a negative bias input of the first comparator means being connected to negative bias source means, the input of the first flip-flop means being connected to the output of the first comparator means while the output of the first flip-flop means is connected to an input of the AND gate means, the output of the gate means being connected to the input of the second flip-flop means,

first resistor means parallel connected to the first comparison circuit means between the first comparator means and the terminal means,

the second comparison circuit means having a second series of series interconnected components, namely;

second resistor means, capacitor means, buffer means, and second comparator means, the second resistor means being parallel connected to the first comparison means between the first comparator means and the first resistor means, the capacitor means being interposed between and interconnected to the second resistor means and the buffer means, the forward bias input of the second comparator means being connected to the buffer means, the negative bias input of the second comparator means being connected to negative bias source means, the output of the second comparator means being connected to another input of the gate means,

normally-open first switch means having solenoid means for selectively closing same, the first switch means being interposed between and interconnected to the first resistor means and a ground,

normally-closed second switch means having solenoid means for selectively opening same, the second switch means having one terminal parallel connected to the second comparison circuit means between the capacitor means and the buffer means, the second switch means having another terminal connected to a ground,

the logic means having first and second lead means connected to the solenoid means of the first and second switch means respectively, and the logic means having third and fourth lead means connected to another input of the first and second flip-flop means respectively,

said first lead means being energized by said logic means to energize the solenoid means of said first switch means so as to close the first switch means at a first predetermined time thereby placing a battery to be tested under load by said first resistor means, said first comparator means for comparing the output terminal voltage of the battery in relation to a predetermined negative biased reference voltage at the negative bias input of the first comparator means when the first switch means is closed,

said second lead means being energized by said logic means to energize the solenoid means of the second switch means so as to open the second switch means at a second predetermined time, said second comparator means for comparing the output voltage of the battery in relation to a predetermined negative biased reference voltage at the negative bias input of the second comparator means when the second switch means is opened,

said third lead means being energized by said logic means for timely transmitting a first pulse to the other input of the first flip-flop means so as to cause triggering of the first flip-flop means output to the input of the gate means when the voltage output of the first comparator means is sufficient, and

said fourth lead means being energized by said logic means for timely transmitting a second pulse so as to cause triggering of an output from said second flip-flop means when the input of the second flip-flop means is energized by the output of said gate means as the result of both inputs of said gate means having simultaneously sufficient voltages from the outputs of both the first flip-flop means and the second comparator means during evaluation of a battery by the tester.

2. A tester as set forth in claim 1 wherein the output of the second flip-flop means is connected to illumination means for indicating the acceptability of a battery evaluated by said tester.

3. A tester as set forth in claim 1 wherein said logic means includes illumination means for indicating when a battery is being evaluated by said tester and for flashing when a battery is unacceptable after being evaluated by said tester.

4. A tester as set forth in claim 1 wherein the solenoid means of said second switch means is energized by said second lead means from about one-tenth (0.1) of a second to about five-tenths (0.5) of a second after the first lead means energizes the solenoid means of the first switch means.

5. A tester as set forth in claim 1 wherein the second lead means energizes the solenoid means of the second switch means for a time period from about twenty (20) seconds to approximately forty (40) seconds.

6. A tester as set forth in claim 1 wherein the negative bias input of each comparator means includes adjustment means.

7. A tester as set forth in claim 1 wherein the adjustment means is adjustable potentiometer means.

8. A tester as set forth in claim 1 wherein said logic means is provided with further means connected to said first and second flip-flop means for reinitiating same after a battery has been evaluated by said tester.

9. A tester as set forth in claim 1 wherein the capacitor means has a capacitance of approximately one-tenth of a microfarad (0.1 uf).

10. A tester as set forth in claim 1 wherein the first resistor means has a resistance of approximately ten (10) ohms.