Quick charging circuit
First Claim
Patent Images
1. A quick charging circuit comprising:
- a charging current generating circuit including a rectifier connected to an A.C. power source and a high frequency invertor connected to said rectifier for supplying a charging current to a storage battery wherein said high frequency invertor includes a first switching transistor connected at the collector to the primary winding of a transformer connected at the secondary winding to said storage battery, and a second switching transistor for bypassing a base current which biases said first switching transistor and reducing said charging current;
a circuit for detecting a voltage across said battery including a detecting IC circuit which generates a low level output upon detection of a predetermined voltage;
an integrating circuit provided with respect to said battery voltage detecting circuit for restraining any influence of high frequency components in said battery voltage wherein said integrating circuit is connected to a third transistor which is turned OFF with an output lower than a set level in response to said low level output of said detecting IC circuit and wherein said integrating circuit is connected after said battery voltage detecting circuit; and
a timer circuit operated by an output of said battery voltage detecting circuit wherein said timer circuit has an input terminal connected to the collector of said third transistor, is actuated upon a high level at said input terminal, and provides after a predetermined time elapsed, an output for biassing said second switching transistor thereby controlling a base current biassing said first switching transistor and reducing said charging current, and wherein said timer circuit is connected after said integrating circuit.
1 Assignment
0 Petitions
Accused Products
Abstract
A quick charging circuit comprises a charging current generating circuit including a rectifier connected to an A.C. power source and a high frequency inverter connected to the rectifier for supplying a charging current to a storage battery, a circuit for detecting a voltage across the battery, a timer circuit operated by an output of the battery voltage detecting circuit, and means for reducing the charging current in response to a time limit output of the timer circuit, wherein an integrating circuit is provided with respect to the battery voltage detecting circuit so that any influence of high frequency components in the battery voltage can be removed, whereby the timer circuit can be operated accurately with a set voltage to reduce the charging current and to reliably prevent the battery from being subjected to any overcharging and internal pressure rise.
22 Citations
1 Claim
-
1. A quick charging circuit comprising:
-
a charging current generating circuit including a rectifier connected to an A.C. power source and a high frequency invertor connected to said rectifier for supplying a charging current to a storage battery wherein said high frequency invertor includes a first switching transistor connected at the collector to the primary winding of a transformer connected at the secondary winding to said storage battery, and a second switching transistor for bypassing a base current which biases said first switching transistor and reducing said charging current; a circuit for detecting a voltage across said battery including a detecting IC circuit which generates a low level output upon detection of a predetermined voltage; an integrating circuit provided with respect to said battery voltage detecting circuit for restraining any influence of high frequency components in said battery voltage wherein said integrating circuit is connected to a third transistor which is turned OFF with an output lower than a set level in response to said low level output of said detecting IC circuit and wherein said integrating circuit is connected after said battery voltage detecting circuit; and a timer circuit operated by an output of said battery voltage detecting circuit wherein said timer circuit has an input terminal connected to the collector of said third transistor, is actuated upon a high level at said input terminal, and provides after a predetermined time elapsed, an output for biassing said second switching transistor thereby controlling a base current biassing said first switching transistor and reducing said charging current, and wherein said timer circuit is connected after said integrating circuit.
-
Specification
-
- Resources
Litigation Campaign Assessment
Thank you for your request. You will receive a custom alert email when the Litigation Campaign Assessment is available.
×
-
Current AssigneeAsahi Matsushita Electric Works Ltd. (Panasonic Holdings Corporation)
-
Original AssigneeAsahi Matsushita Electric Works Ltd. (Panasonic Holdings Corporation)
-
InventorsFurukawa, Kaoru
-
Primary Examiner(s)Hickey, R. J.
-
Application NumberUS06/724,574Time in Patent Office768 DaysField of Search320/20, 320/21, 320/37, 320/38, 320/31US Class Current320/149CPC Class CodesH02J 7/00712 the cycle being controlled ...
