Power-saving voltage supply

• US 4,683,382 A
• Filed: 11/01/1984
• Issued: 07/28/1987
• Est. Priority Date: 02/22/1984
• Status: Expired due to Term

• Current Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Iizuka, Tetsuya, Sakurai, Takayasu
• Primary Examiner(s): Miller, Stanley D.
• Assistant Examiner(s): Wambach, M. R.
• Application Number:
  US06/667,417
• Time in Patent Office: 999 Days
• Field of Search: 365/226-227, 307/200 B, 307/296 R, 307/491, 307/496, 307/497, 307/362, 307/585, 307/264, 307/540, 307/567, 307/568
• US Class Current: 327/544
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence

Abstract

In a semiconductor device according to the invention, first and second voltage dropping circuits, for generating voltages respectively having smaller values than that of an external power supply voltage, are provided. The first voltage dropping circuit, which consumes relatively less power, is always in the operative mode, and the second voltage dropping circuit, which consumes more power than that of the first voltage dropping circuit, is operated during an interval other than a standby interval. The voltages generated by the first and second voltage dropping circuits are supplied to an internal power supply line in parallel with each other.

Claims

1. A semiconductor device comprising:

an external power supply terminal to which an external power supply voltage is supplied;

an internal power supply line;

first voltage dropping means, connected between said external power supply terminal and said internal power supply line, operative in at least a standby interval, for generating a first voltage having a smaller value than that of the external power supply voltage to supply the first voltage to said internal power supply line; and

second voltage dropping means, connected between said external power supply terminal and said internal power supply line, operative in an interval other than the standby interval for generating a second voltage having a smaller value than that of the external power supply voltage to supply the second voltage to said internal power supply line.

2. A semiconductor device comprising:

an external power supply terminal to which an external power supply voltage is supplied;

an internal power supply line;

an internal circuit, connected to said internal power supply line, having a standby interval for reducing power consumption and being operated using a voltage of said internal power supply line as a power supply voltage;

first voltage dropping means, connected between said external power supply terminal and said internal power supply line, operative in the standby interval, for generating a first voltage having a lower value than that of the external power supply voltage to supply the first voltage to said internal power supply line; and

second voltage dropping means, connected between said external power supply terminal and said internal power supply line, operative in an interval other than the standby interval, for generating a second voltage having a lower value than that of said external power supply voltage to supply the second voltage to said internal power supply line.

3. A semiconductor device according to claim 2, wherein said first voltage dropping means is operated at all times.

4. A semiconductor device according to claim 2, wherein a first current consumption when said first voltage dropping means is in an operative mode is lower than a second current consumption of said second voltage dropping means.

5. A semiconductor device according to claim 2, wherein said first voltage dropping means includes a plurality of impedance elements each having an impedance of at least more than several mega ohms which are respectively inserted in direct current paths.

6. A semiconductor device according to claim 2, wherein said first voltage dropping means includes

voltage dividing means for dividing the voltage of said internal power supply line;

voltage amplifying means, to which a voltage of said external terminal is supplied as an operating voltage, for amplifying a voltage which is divided by said voltage dividing means; and

variable impedance means, inserted between said external terminal and said internal power supply line, and an impedance controlled in accordance with an output from said voltage amplifying means.

7. A semiconductor device according to claim 2, wherein said second voltage dropping means includes

reference voltage generating means, operative only in an interval other than the standby interval, for generating a predetermined reference voltage;

voltage comparing means, operative only in an interval other than the standby interval, for comparing a voltage of said internal power supply line with the reference voltage; and

variable impedance means, inserted between said external terminal and said internal power supply line and an impedance controlled in accordance with output from said voltage comparing means.

8. A semiconductor device according to claim 6, wherein said voltage dividing means includes a plurality of impedance elements each having a resistance of several mega ohms and being connected in series with each other.

9. A semiconductor device according to claim 6, wherein said voltage amplifying means includes an inverting circuit including a load element having a resistance of several mega ohms and a metal oxide semiconductor transistor as a driver.

10. A semiconductor device according to claim 6, wherein said variable impedance means includes a metal oxide semiconductor transistor having a gate to which an output from said voltage amplifying means is supplied.

11. A semiconductor device according to claim 8, wherein said plurality of impedance elements are resistors.

12. A semiconductor device according to claim 8, wherein said plurality of impedance elements are metal oxide semiconductor transistors.

13. A semiconductor device according to claim 9, wherein said load element is a resistor.

14. A semiconductor device according to claim 9, wherein said load element is a metal oxide semiconductor transistor.

15. A semiconductor device according to claim 7, wherein said reference voltage generating means includes

switching means, being controlled to switch in accordance with a control signal, for controlling the standby interval;

and

a plurality of metal oxide semiconductor transistors, being connected in series, and generating a constant voltage when a current is supplied through said switching means.

16. A semiconductor device according to claim 7, wherein said voltage comparing means includes a differential amplifier including first and second current paths, and a switching means, being controlled to switch in accordance with a control signal, for controlling the standby interval, said differential amplifier and said switching means being respectively inserted in said first and second current paths.

17. A semiconductor device according to claim 7, wherein said variable impedance means includes a metal oxide semiconductor transistor having a gate to which an output from said voltage comparing means is supplied.