System for formatting digital signals to be transmitted

• US 4,729,020 A
• Filed: 06/01/1987
• Issued: 03/01/1988
• Est. Priority Date: 06/01/1987
• Status: Expired due to Fees

• Current Assignee: Delta Information Systems Horsham Pennsylvania
• Original Assignee: Delta Information Systems, Inc.
• Inventors: Randall, Neil, Schaphorst, Richard A.
• Primary Examiner(s): Britton, Howard W.
• Application Number:
  US07/056,042
• Time in Patent Office: 274 Days
• Field of Search: 358/133, 358/135, 358/136, 358/138, 358/140, 375/31
• US Class Current: 375/240.05
• CPC Class Codes: H04N 19/00 Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
• CPC Class Codes: H04N 19/152 by measuring the fullness of the transmission buffer
• CPC Class Codes: H04N 19/50 using predictive coding H04N19/61 takes precedence
• CPC Class Codes: H04N 19/587 involving temporal sub-sampling or interpolation, e.g. decimation or subsequent interpolation of pictures in a video sequence
• CPC Class Codes: H04N 19/59 involving spatial sub-sampling or interpolation, e.g. alteration of picture size or resolution
• CPC Class Codes: H04N 19/93 Run-length coding

Abstract

In a preferred embodiment, a computer is employed to control the system. The system initially accepts analog signals and converts them into digital signals, which are then compressed, at a DPCM encoder, into a three bit code. Thereafter the once compressed signals are further compressed in accordance with a variable length code. The twice compressed digital signals are transmitted through formatter circuitry whereat a tag is added to indicate (in addition to other information) what forms of compression have been employed on the digital signals which follow the tag. The twice compressed and tagged digital signals are forwarded to a buffer storage device. The role of the buffer storage is to keep a relatively constant supply of data signals so that there is a relatively constant supply of pels moving to the transmitter at a constant frequency. The computer monitors the buffer fullness and the rate at which it is being loaded or is emptying. In response to such monitoring the system compresses more lines of digitized video or compresses less lines of digitized video. Additional compression can be effected by horizontal subsampling or by changing the first DPCM coding operation from a three bit code to a two bit code. The present system also includes a decoding loop which accepts the compressed and tagged digital signals. The compressed signals are initially synchronized in response to the tags so that the compressed signals are properly advanced into the stages of the decoding loop. The compressed signals are then decompressed (decoded) in accordance with the information carried by the tag. Thereafter the expanded digital signals are converted into analog signals for display on a video screen.

Claims

1. A system for variably altering the format of image data signals to enable an encoded transmission thereof while maintaining an acceptable resolution for the output image comprising in combination:

data processing means programmed to respond to the value of available empty storage space in a signal storage means and to the rate of which said empty space is lessening or increasing and formed to generate and provide control signals in response thereto;

clock signal generating means to provide a plurality of different timing signals connected to said data processing means;

analog to digital converter means formed to receive analog signals and convert them into digital signals, said analog to digital converter means connected to said clock signal generating means to receive timing signals therefrom;

compression encoding means for compressing digital signals by selectively altering the format of digital signals received thereby, said compression encoding means connected to said analog to digital converter means to receive digital signals therefrom and connected to said data processin means to receive said control signals therefrom;

signal storage means to store digital signals, said signal storage means designed to generate status signals from which the available empty storage space can be determined and from which the rate of which said empty storage space is lessening or increasing can be determined;

first circuitry means connecting said signal storage means to said data processing means to transmit status signals thereto whereby said data processing means generates and transmits control signals to said compression encoding means to selectively alter the format of digital signals being transmitted through said compression encoding means.

2. A system for variably altering the format of image data signals according to claim 1 wherein said analog to digital converter converts said analog signals into 8 bit coded signals and wherein said compression encoding means compresses said 8-bit coded signals into 2 bit coded signals.

3. A system for variably altering the format of image data signals according to claim 1 wherein said status signals are read address signals and write address signals.

4. A system for variably altering the format of image data signals according to claim 1 wherein said compression encoding means includes means to advance only certain ones of the digital signals in response to control signals from said data processing means whereby a train of said digital signals can be compressed by subsampling.

5. A system for variably altering the format of image data signals according to claim 1 wherein there is further included a signal transmission means to transmit said encoded digital signals.

6. A system for variably altering the format of image data signals according to claim 5 wherein there is further included a decoding loop means which receives said encoded digital signals and decodes them into analog signals which substantially resemble said analog signals received by said analog to digital converter.

7. A system for variably altering the format of image signals according to claim 6 wherein said decoding loop includes an interpolation means to insert signals in a train of digital signals by interpolation if said digital signals have been subjected to compression by subsampling.

8. A system for variably altering the format of image data signals according to claim 1 wherein said analog to digital converter converts said analog signals into 8 bit coded signals and wherein said compression encoding means compresses said 8 bit coded signals into 3 bit coded signals.

9. A system for variably altering the format of image data signals according to claim 2 wherein said compression encoding means includes means to further compress said 3 bit coded signals according to a variable length code.

10. A system for variably altering the format of image data signals according to claim 9 wherein said compression encoding means includes formatting means which insert a tag prior to a train of digital signals which have been compressed into a 3 bit code and which are further compressed in accordance with a variable length code, which tag indicates to what forms of compression said train of digital signals has been subjected.

11. A system for variably altering the format of image data signals according to claim 10 wherein the number of lines compressed will be reduced in response to said available empty storage space becoming too large.

12. A system for variably altering the format of image data signals to enable an encoded transmission thereof while maintaining an acceptable resolution for the output image comprising in combination:

data processing means programmed to respond to the value of available empty space in a signal storage means and to the rate at which said empty space is lessening or increasing and formed to generate and provide control signals;

clock signal generating means to provide a plurality of different timing signals connected to said data processing means;

analog to digital converter means formed to receive analog signals and convert them into digital signals, said analog to digital converter means connected to said clock signal generating means to receive timing signals therefrom;

differential pulse code modulation means connected to said analog to digital converter means, to said data processing means, and to said clock signal generating means to transform said digital signals received from said analog to digital converter means into a 3 digit code;

entropy encoder means connected to said clock signal generating means, to said data processing means and to said differential pulse code modulation means to receive said 3 digit code signals and transform them into a further compressed set of signals in accordance with a variable length code;

formatting means connected to said clock signal generating means, to said data processing means and to said entropy encoder means to receive a train of data signals therefrom which have been compressed at least twice and to insert a tag to precede said train of signals which tag indicates to what forms of compression said train of signals have been subjected;

signal storage means connected to said clock signal generating means, to said data processing means and to said formatting means to receive data signals therefrom and store said data signals, said signal storage means including means to record the last read address employed and the last write address employed and mean to transmit said last read address and said last write address to said data processin means whereby said data processing means can determine the amount of empty space in said signal storage means and the rate at which said signal storage is being loaded or is being emptied to generate control signals for compressing more video lines or reducing the number of video lines being compressed; and

digitized signal transmitting means connected to transmit said compressed digitized signals to a receiving means.