Occupancy control system for plural serial buses

• US 4,748,560 A
• Filed: 10/11/1985
• Issued: 05/31/1988
• Est. Priority Date: 10/15/1984
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Kataoka, Isaburou
• Primary Examiner(s): Williams, Jr., Archie E.
• Assistant Examiner(s): Munteanu, Florin
• Application Number:
  US06/786,826
• Time in Patent Office: 963 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 340/825.01, 340/825.03, 340/825.05, 340/825.5, 340/825.51, 370/85, 370/86, 370/89, 371/7, 371/8, 371/11
• US Class Current: 710/107
• CPC Class Codes: G06F 13/37 using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing

Abstract

Plural stations are connected to two independent serial buses and they are permitted to occupy a first serial bus in a predetermined order under control of a bus controller. A second serial bus is used for transmitting to the bus controller an urgent bus occupancy request issued by any of the stations. Upon receipt of the urgent bus occupancy request, the bus controller permits the request-issuing station to occupy the first serial bus regardless of the predetermined order, thereby insuring a fault-free operation of the system for transmitting data between the stations.

Claims

1. A system for controlling the occupancy of a first serial bus between plural stations connected to said first serial bus, said system comprising:

a second serial bus having a function independent of said first serial bus, said stations also being connected to said second serial bus, and

a bus controller connected to said first and second serial buses for controlling the occupancy of both of said serial buses;

said stations each having a host computer, a transmission station for transmission and reception of signals through said first and second serial buses under control of said host computer, and means provided in said transmission station for sending an interrupt request signal to said second serial bus in response to an urgent occupancy request issued by said host computer;

said bus controller having means for performing a token pass control to permit the stations to occupy said first serial bus successively in a predetermined order when none of the stations send an interrupt request signal to said second serial bus, and means for detecting an interrupt request signal provided from any one of the stations to said second serial bus, suspending the token pass control and permitting the interrupt request signal-issuing station to occupy said first serial bus;

each of said transmission stations including a port section and a first link control section connected to each other, said port section being connectible to said second serial bus through said first link control section in the event of a fault in said first serial bus, said bus controller including a token control section connected to a second link control section, said token control section being connectible to said second serial bus through said second link control section, a first switch in each transmission station for connecting said port section of the station to said second serial bus in the event of a fault in said first serial bus and a second switch in said bus controller for connecting said token control section to said second serial bus in the event of a fault in said first serial bus.

2. A system according to claim 1, wherein each said transmission station has said first link control section for data transmission and a third link control section for transmission of an interrupt request signal, said means for sending an interrupt request signal including said third link control section, said first and third link control sections being connected to said first and second serial buses, respectively, and wherein said bus controller has a token control section connected to said first serial bus through a fourth link control section and an interrupt control section connected to said second serial bus through said second link control section.