Power semiconductor module

• US 4,766,481 A
• Filed: 10/31/1986
• Issued: 08/23/1988
• Est. Priority Date: 11/02/1985
• Status: Expired due to Term

• Current Assignee: IXYS Corporation (Littelfuse Incorporated)
• Original Assignee: Brown Boveri & CIE AG (ABB Limited)
• Inventors: Bayerer, Reinhold, Gobrecht, Jens
• Primary Examiner(s): Edlow, Martin H.
• Assistant Examiner(s): NOT, DEFINED
• Application Number:
  US06/925,414
• Time in Patent Office: 662 Days
• Field of Search: 357/80, 357/79, 357/74, 357/75
• US Class Current: 257/664
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/37099 Material
• CPC Class Codes: H01L 2224/40095 Kinked
• CPC Class Codes: H01L 2224/40225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/49109 outside the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/73221 Strap and wire connectors
• CPC Class Codes: H01L 2224/73263 Layer and strap connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83801 Soldering or alloying
• CPC Class Codes: H01L 2224/84 using a strap connector
• CPC Class Codes: H01L 23/5383 Multilayer substrates H01L23/5385 takes precedence; multilayer metallisation on monolayer substrates H01L23/538
• CPC Class Codes: H01L 24/36 Structure, shape, material or disposition of the strap connectors prior to the connecting process
• CPC Class Codes: H01L 24/40 of an individual strap connector
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/162 the devices being mounted on two or more different substrates
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/12032 : Schottky diode
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/30111 : matching

Abstract

A power semiconductor module includes a multi-layered substrate formed of a first ceramic bottom plate, at least one second ceramic plate disposed above and parallel to the first ceramic bottom plate, a metal foil in the form of a textured metallization located between and directly bonded to the ceramic plates, the second ceramic plate having cutouts formed therein, and assembly elements soldered in the cutouts.

Claims

1. Power semiconductor module, comprising a multi-layered substrate formed of a first ceramic bottom plate, at least one second ceramic plate disposed above and parallel to said first ceramic bottom plate, a metal foil in the form of a textured metallization having a thickness of substantially between 0.1 and 0.5 mm located between and directly bonded to said ceramic plates, said second ceramic plate having cutouts formed therein defining a soldering form, and assembly elements fixed in place by said soldering form and soldered in said cutouts.

2. Power semiconductor module according to claim 1, including at least one other ceramic plate disposed on said second ceramic plate and at least one other textured metallization disposed between and directly bonded to said second ceramic plate and said at least one other ceramic plate, said at least one other ceramic plate having cutouts formed therein for said assembly elements.

3. Power semiconductor module according to claim 1, including other ceramic plates disposed above said second ceramic plate and other textured metallizations disposed between said second ceramic plate and one of said other ceramic plates and between said other ceramic plates, said other ceramic plates having cutouts formed therein for said assembly elements.

4. Power semiconductor module according to claim 1, wherein said first ceramic bottom plate has a lower surface, and including another metallization disposed on said lower surface.

9. Power semiconductor module according to claim 1, including a resistor connected to one of said assembly elements.

5. Power semiconductor module, comprising a multi-layered substrate formed of a first ceramic bottom plate, at least one second ceramic plate disposed above and parallel to said first ceramic bottom plate, a metal foil in the form of a textured metallization having a thickness of substantially between 0.1 and 0.5 mm located between and directly bonded to said ceramic plates, said second ceramic plate having cutouts formed therein defining a soldering form, and assembly elements fixed in place by said soldering form and soldered in said cutouts, said textured metallization and said second ceramic plate forming striplines having a defined wave resistance.

6. Power semiconductor module according to claim 5, wherein said striplines have a given width and spacing, and including connection elements connected to said metallization having said given width and spacing of said striplines for extending said defined wave resistance of said internal striplines to external connections.

7. Power semiconductor module, comprising a multi-layered substrate formed of a first ceramic bottom plate having a lower surface, at least one second ceramic plate disposed above and parallel to said first ceramic bottom plate, a metal foil in the form of a textured metallization having a thickness of substantially between 0.1 and 0.5 mm located between and directly bonded to said ceramic plates, another metallization disposed on said lower surface of said first ceramic plate, said second ceramic plate having cutouts formed therein defining a soldering form, and assembly elements fixed in place by said soldering form and soldered in said cutouts, said metallizations and said second ceramic plate forming striplines having a defined wave resistance.

8. Power semiconductor module according to claim 7, wherein said striplines have a given width and spacing, and including connection elements connected to said metallizations having said given width and spacing of said striplines for extending said defined wave resistance of said internal striplines to external connections.

10. Power semiconductor module, comprising a multi-layered substrate formed of a first ceramic bottom plate, at least one second ceramic plate disposed above and parallel to said first ceramic bottom plate, a metal foil in the form of a textured metallization having a thickness of substantially between 0.1 and 0.5 mm located between and directly bonded to said ceramic plates, said second ceramic plate having cutouts formed therein defining a soldering form, assembly elements fixed in place by said soldering form and soldered in said cutouts, and a further metallization disposed on said second ceramic plate, said second ceramic plate and said metallizations having recesses and bores formed therein permitting a soft casting compound introduced therein to creep into given locations in the module.