Microprocessor intended particularly for executing the calculation algorithms of a public code encoding system
First Claim
1. A one chip microprocessor for executing a public key algorithm of a public code encoding system formed by a public function and a secret inverse function of the type comprising at least one programmable read-only memory, a processing unit and an input/output device, wherein it comprises a memory, in which is recorded at least one algorithm corresponding to the performance of said secret function, and wherein the programmable read-only memory contains the secret parameters constituting the secret code and recorded in an area of the read-only memory which is inaccessible from the outside, the processing unit including multiplying circuits for the execution of the algorithm, the microprocessor further including a first address register for addressing an information to be modified into the memory and a second register for the address progression of a writing sequence authorizing the writing of the modified information of the memory, said two registers being respectively associated with two data registers.
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Accused Products
Abstract
One chip microprocessor, which is more particularly designed to execute culation algorithms of a public code encoding system formed by a public function and a secret inverse function of the type comprising at least one programmable read-only memory, a processing unit and an input/output device, wherein it comprises a memory, in which is recorded at least one algorithm corresponding to the performance of said secret function, and wherein the programmable read-only memory contains the secret parameters constituting the secret code and recorded in an area of the read-only memory which is inaccesible from the outside, the processing unit including the multiplying circuits necessary for the execution of the algorithm.
110 Citations
14 Claims
- 1. A one chip microprocessor for executing a public key algorithm of a public code encoding system formed by a public function and a secret inverse function of the type comprising at least one programmable read-only memory, a processing unit and an input/output device, wherein it comprises a memory, in which is recorded at least one algorithm corresponding to the performance of said secret function, and wherein the programmable read-only memory contains the secret parameters constituting the secret code and recorded in an area of the read-only memory which is inaccessible from the outside, the processing unit including multiplying circuits for the execution of the algorithm, the microprocessor further including a first address register for addressing an information to be modified into the memory and a second register for the address progression of a writing sequence authorizing the writing of the modified information of the memory, said two registers being respectively associated with two data registers.
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7. On a single self programmable semiconductor chip, a microprocessor for executing a public key algorithm of a public code encoding system formed by a public function and a secret inverse function said chip comprising at least one programmable read-only memory, a processing unit and an input/output device, said chip comprising a memory, in which is recorded at least one algorithm corresponding to the performance of said secret function, and said programmable read-only memory containing the secret parameters constituting the secret inverse function, said secret parameters being in an area of the read-only memory which is inaccessible from the outside, the processing unit processing information contained in said memory and including multiplying circuits for the execution of the algorithm, and
means for enabling data to be written in the programmable read-only memory comprising, an address register loaded by said processing unit means for addressing a location address in said PROM and, a data register loaded by said processing unit means for storing data to be modified, means for holding stable the location address and the data, and means for holding stable the write voltage required to write data in said memory during the entire period of the time required by the PROM.
Specification