Semiconductor memory using trench capacitor
First Claim
1. A semiconductor memory comprising:
- a plurality of word lines, data lines and memory cells that are disposed on a semiconductor substrate of a first conductivity type, wherein said memory cells are arranged in matrix;
data storage portions formed for each of said memory cells, wherein each of said data storage portions comprises;
first and second trenches formed in said substrate,an impurity doped region having a second conductivity type opposite to said first conductivity type, wherein said impurity doped region is formed in said substrate so as to extend between a side wall of the first trench and a side wall of said second trench,at least one insulating film formed on said side walls of said first and second trenches, anda plate electrode disposed on said insulating film in both said first and second trenches,wherein a first capacitance for said data storage portions is formed by the impurity doped region, a first portion of the plate electrode which is disposed in the first trench and a second portion of the insulating film which is disposed between the impurity doped region and the first portion of the plate electrode, wherein a second capacitor for said data storage portion is formed by the impurity doped region, a second portion of the plate electrode which is disposed in the second trench and a second portion of the insulating film which is disposed between the impurity doped region and the second portion of the plate electrode, and further wherein the second trench isolates data stored in the first capacitor from data storage portions of other memory cells, andswitches formed for each of said memory cells to connect each memory cell to a data line, wherein each switch includes an MOS transistor having one of a source electrode or a drain electrode connected to the impurity region of said data storage portion and having a gate electrode connected to said word line.
1 Assignment
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Accused Products
Abstract
A memory is disclosed which uses a microcapacitor as a data storage portion. The microcapacitor uses as its main electrode surface the side wall of a first trench formed on a semiconductor substrate, and is fabricated by diffusing an impurity from a second diffusion trench adjacent to the first trench by setting the shapes and diffusion conditions of the first and second trenches so that the tip of the diffusion layer reaches the side wall of the first trench. The capacitor uses the diffusion layer as one of the electrodes. An insulating film is deposited on the side wall of the first trench and an electrode as the other electrode of the capacitor is deposited on this insulating film. The memory can reduce a leakage current between memory cells by connecting the capacitor to a transistor fabricated in the same semiconductor substrate, and can be formed within a limited space.
8 Citations
11 Claims
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1. A semiconductor memory comprising:
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a plurality of word lines, data lines and memory cells that are disposed on a semiconductor substrate of a first conductivity type, wherein said memory cells are arranged in matrix; data storage portions formed for each of said memory cells, wherein each of said data storage portions comprises; first and second trenches formed in said substrate, an impurity doped region having a second conductivity type opposite to said first conductivity type, wherein said impurity doped region is formed in said substrate so as to extend between a side wall of the first trench and a side wall of said second trench, at least one insulating film formed on said side walls of said first and second trenches, and a plate electrode disposed on said insulating film in both said first and second trenches, wherein a first capacitance for said data storage portions is formed by the impurity doped region, a first portion of the plate electrode which is disposed in the first trench and a second portion of the insulating film which is disposed between the impurity doped region and the first portion of the plate electrode, wherein a second capacitor for said data storage portion is formed by the impurity doped region, a second portion of the plate electrode which is disposed in the second trench and a second portion of the insulating film which is disposed between the impurity doped region and the second portion of the plate electrode, and further wherein the second trench isolates data stored in the first capacitor from data storage portions of other memory cells, and switches formed for each of said memory cells to connect each memory cell to a data line, wherein each switch includes an MOS transistor having one of a source electrode or a drain electrode connected to the impurity region of said data storage portion and having a gate electrode connected to said word line. - View Dependent Claims (5, 7, 8, 10)
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2. A semiconductor memory comprising:
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a plurality of word lines, data lines and memory cells that are disposed on a semiconductor substrate of a first conductivity type, wherein said memory cells are arranged in matrix; data storage portions formed for each of said memory cells, wherein each of said data storage portions comprises; first and second trenches formed in said substrate; an impurity doped region having a second conductivity type opposite to said first conductivity type, wherein said impurity doped region is formed in said substrate so as to extend between a side wall of the first trench and a side wall of said second trench; an insulating film formed on said side wall of said second trench; and a plate electrode disposed on said insulating film in said second trench, wherein a capacitor for said data storage portion is formed by said impurity doped region, said insulating film and said plate electrode; switches formed for each of said memory cells to connect each memory cell to a data line, wherein each switch includes an MOS transistor having one of a source electrode or a drain electrode connected to the impurity region of said data storage portion, and having a gate electrode connected to said word line, wherein said memory cells include at least first and second memory cells connected to said data lines which first and second memory cells are adjacent to one another and wherein the first trenches of said first and second memory cells are surrounded by said second trench, wherein the first and second memory cells are connected to the same data line, and wherein said second trench isolates data stored in said capacitors of said first and second memory cells from data storage portions of other memory cells. - View Dependent Claims (6, 11)
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3. A capacitor structure comprising:
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first and second trenches formed in a semiconductor substrate of a first conductivity type; an impurity doped region having a second conductivity type opposite to said first conductivity type formed to extend between a side wall of the first trench and a side wall of said second trench; at least one insulating film formed on said side walls of said first and second trenches; and a plate electrode disposed on said insulating film in both said first and second trenches, wherein a first capacitor is formed by the impurity doped region, a first portion of the plate electrode which is disposed in the first trench and a first portion of the insulating film which is disposed between the impurity region and the first portion of the plate electrode, wherein a second capacitor is formed by the impurity doped region, a second portion of the plate electrode which is disposed in the second trench and a second portion of the insulating film which is disposed between the impurity doped region and the second portion of the plate electrode, and further wherein the second trench isolates an electric charge stored in the first capacitor from other elements formed in said substrate.
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4. A capacitor structure comprising:
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a pair of first trenches formed in a semiconductor substrate of a first conductivity and spaced apart from one another by a predetermined distance; a second trench formed in said substrate and having a first portion to separate said first and second trenches from each other and having a second portion to surround said pair of first trenches; a first impurity doped region of a second conductivity type opposite to said first conductivity type formed between a side wall of said first trench and one side wall of said first portion of said second trench; a second impurity doped region of said second conductivity type formed between a side wall of the other of said first trenches and another side wall of said first portion of said second trench; an insulating film formed to cover said side walls of said first and second portions of said second trench; and a plate electrode formed to cover said insulating film formed over said side walls of said second trench; wherein said second trench surrounds said first and second impurity doped regions, wherein a first capacitor is formed by said first impurity doped region, a portion of the insulating film formed over said one side wall of said first portion of said second trench and said plate electrode, wherein a second capacitor is formed by said second impurity doped region, a portion of the insulating film formed over said another side wall of said first portion of said second trench and said plate electrode, and wherein said second portion of said second trench isolates said first and second capacitors from other capacitors formed in said substrate. - View Dependent Claims (9)
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Specification