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Emulation circuit for interfacing joystick to ROM cartridge slot of computer

  • US 4,868,780 A
  • Filed: 07/27/1987
  • Issued: 09/19/1989
  • Est. Priority Date: 07/27/1987
  • Status: Expired due to Fees
First Claim
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1. An interface circuit for use between a joystick and a computer of the type having a cartridge slot designed to access an application'"'"'s program in read only memory (ROM), said interface circuit comprising:

  • a read only memory, including a plurality of input circuits for connection to said computer via said cartridge slot and a plurality of output circuits for connection to said computer via said cartridge slot;

    an analog interface circuit, including an analog-to-digital converter having a first plurality of input circuits for connection to said computer via said cartridge slot, a second plurality of input circuits and a plurality of output circuits for connection to said computer via said cartridge slot;

    a decoder circuit, including a plurality of input circuits for connection to said computer via said cartridge slot and a plurality of output circuits connected to said second plurality of analog-to-digital converter input circuits said decoder operated to decode a plurality of additional address bits received via said input circuits in response to control bits received on said input circuits to produce a plurality of corresponding control bits coupled via said included output circuits to said analog-to-digital converter and a signal enable output circuit connected to said analog-to-digital converter and to said buffer circuit;

    a clock circuit connected to said analog-to-digital converter, operated to provide periodic pulses to said analog-to-digital converter;

    at least one analog control circuit, including a plurality of output circuits connected to said analog-to-digital converter;

    a multistate buffer circuit, including a plurality of output circuits for connection to said computer via said cartridge slot and at least one enabling input circuit connected to one of said decoder output circuits; and

    said analog control circuit, further including an additional output circuit connected to at least one additional input circuit of said multistate buffer circuit.

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