Error correction for digital signal transmission

• US 4,907,248 A
• Filed: 09/22/1987
• Issued: 03/06/1990
• Est. Priority Date: 09/22/1987
• Status: Expired due to Term

• Current Assignee: Zenith Electronics Corporation (LG Corporation)
• Original Assignee: Zenith Electronics Corporation (LG Corporation)
• Inventors: Bretl, Wayne E.
• Primary Examiner(s): Griffin, Robert L.
• Assistant Examiner(s): Chin, Stephen
• Application Number:
  US07/099,864
• Time in Patent Office: 896 Days
• Field of Search: 375/27, 375/30, 375/31, 375/122, 375/34, 370/110.1, 332/11 D, 358/133, 358/135, 341/76, 371/67, 371/68
• US Class Current: 375/244
• CPC Class Codes: H04L 1/0059 Convolutional codes

Abstract

The system provides correction for error signals caused by noise in the transmission channel in digital signals or analog signals which have been digitized. The first or second differential of the quantized values is taken and encoded. One or more reliable update signals per data block are included in the transmitted signal. Using any difference between an update signal value and the corresponding actual received signal value, an error signal in time reverse sequence is reconstructed in the receiver. This signal is reversed and subtracted from a signal containing the error signal to produce an accurate output signal.

Claims

1. A system for the transmission and reception of a digital signal comprising:

source means for providing said digital signal;

processing means for providing a differential signal from said digital signal;

channel coding means for dividing said differential signal into blocks and providing an error-immune update signal for the last value of each block;

means for transmitting at least said differential signal and said update signal;

means for receiving said transmitted signals;

means for separating said received signals into at least two signals, said update signal and said differential signal, the differential signal including any channel noise component;

first signal deriving means for utilizing said differential signal to provide a first derived signal which corresponds to said digital signal plus any error signal due to said channel noise component;

second signal deriving means for utilizing both of said separated signals to provide a second derived signal which corresponds to said error signal; and

means for combining said first and second derived signals to provide a first output signal which corresponds to said digital signal.

2. The transmission system according to claim 1 and further including encoding means for encoding said differential signal and said update signal prior to transmission, and decoding means for decoding said signals after transmission.

3. The transmission system according to claim 2 wherein said encoding means utilizes a variable word length code based on the probabilities of occurrence of the differentials of said differential signals.

4. The transmission system according to claim 1 wherein said transmitting means includes modulating means for modulating at least said differential signals and said update signals onto a carrier frequency signal, and said receiving means includes demodulating means.

5. The transmission system according to claim 1 wherein said first and second deriving means comprise integrating means.

6. The transmission system according to claim 1 wherein said differential signal is a second differential signal.

7. A system for the transmission and reception of a digital signal comprising:

source means for providing said digital signal;

processing means for providing a differential signal from said digital signal;

channel coding means for dividing said differential signal into blocks and providing an error-immune update signal for the last value of said digital signal of said block;

means for transmitting at least said differential signal and said update signal;

means for receiving said transmitted signals;

means for separating said receiving signals into at least two signals, said update signal and said differential signal, the differential signal including any channel noise component;

first signal deriving means for utilizing said differential signal to provide a first derived signal which corresponds to said digital signal plus any error signal due to said channel noise component, wherein said first deriving means comprises first and second integrating means, said integrating means being sequentially connected;

second signal deriving means for utilizing both of said separated signals to provide a second derived signal which corresponds to said error signal; and

means for combining said first and second derived signals to provide a first output signal which corresponds to said digital signal.

8. A system for the transmission and reception of a digital signal comprising:

source means for providing said digital signal;

processing means for providing a differential signal from said digital signal;

channel coding means for dividing said differential signal into blocks and providing an error-immune update signal for the last value of the digital signal of each block;

means for transmitting at least said differential signal and said update signal;

means for receiving said transmitted signals;

means for separating said received signals into at least two signals, said update signal and said differential signal, the differential signal including any channel noise component;

first signal deriving means for utilizing said differential signal to provide a first derived signal which corresponds to said digital signal plus any error signal due to said channel noise component.

second signal deriving means for utilizing both of said separated signals to provide a second derived signal which corresponds to said error signal wherein said second deriving means comprises first and second integrating means, said integrating means being sequentially connected; and

means for combining said first and second derived signals to provide a first output signal which corresponds to said digital signal.

9. A system for the transmission and reception of a digital signal comprising:

source means for providing said digital signal;

processing means for providing a differential signal from said digital signal;

channel coding means for dividing said differential signal into blocks and providing an error-immune update signal for the last value of each block;

means for transmitting at least said differential signal and said update signal;

means for receiving said transmitted signals;

means for separating said received signals into at least two signals, said update signal and said differential signal, the differential signal including any channel noise component;

first deriving means including first and second integrators and utilizing said differential signal to provide a first derived signal which corresponds to said digital signal plus any error signal due to said channel noise component;

second deriving means including third and fourth integrators and utilizing both of said separated signals to provide a second derived signal which corresponds to said error signal; and

means for combining said first and second derived signals to provide a first output signal which corresponds to said digital signal.

10. A system for the transmission and reception of a digital signal comprising:

source means for providing said digital signal;

processing means for providing a differential signal from said digital signal;

channel coding means for dividing said differential signal into blocks and providing an update signal for the last value of each block, said update signal being essentially immune to error caused by noise in the transmission channel;

means for transmitting at least said differential signal and said update signal;

means for receiving said transmitted signals;

means for separating said received signals into at least two signals, said update signal and said differential signal, the differential signal including any channel noise component;

first deriving means for providing a first derived signal which corresponds to said digital signal plus any error signal due to said channel noise component and including;

first combining means for combining said differential signal and a feedback signal,

accumulator means for accumulating the output signals of said combining means during each said block, and storage means for storing the accumulator means output signals, said storage means being coupled to supply said feedback signal;

second deriving means for utilizing both of said separated signals to provide a second derived signal which corresponds to said error signal; and

second combining means for combining said first and second derived signals to provide a first output signal which corresponds to said digital signal.

11. The transmission system according to claim 10 and further including buffer means coupled between said storage means and said first combining means and having a gain equal to or less than unity.

12. The transmission system according to claim 10 and wherein said first deriving means further includes third combining means for combining the output signals of said storage means with a second feedback signal, second accumulator means for accumulating the output signals of said third combining means during each said block, and second storage means for storing the output signals of said second accumulator means, said second storage means being coupled to supply said second feedback signal.

13. The transmission system according to claim 12 and further including buffer means coupled between said second storage means and said third combining means and having a gain of approximately but less than unity.

14. The transmission system according to claim 12 and wherein said second deriving means includes;

fourth combining means coupled to said first deriving means and said separating means for providing a first final block value of said error signal,

third accumulator means coupled for accumulating said final block value and a third feedback signal during each said block,

third storage means coupled to said third accumulator means output, said third storage means being coupled to supply said third feedback signal,

fifth combining means coupled to said third storage means and said separating means for providing a second final block value of said error signal,

fourth accumulator means coupled for accumulating a fourth feedback signal during each said block, and

fourth storage means for storing the fourth accumulator means output signals and said second final block value, said fourth storage means being coupled to supply said fourth feedback signal.

15. The transmission system according to claim 14 wherein said second deriving means further includes buffer means coupled in the paths of at least one of said third and fourth feedback signals and having respective gains of approximately but not less than unity.

16. A system for the transmission and reception of a digital signal comprising:

source means for providing said digital signal;

processing means for providing a differential signal from said digital signal;

channel coding means for dividing said differential signal into blocks and providing at least one update signal for the last value of each block, said update signal being essentially immune to error caused by noise in the transmission channel;

means for transmitting at least said differential signal and said update signal;

means for receiving said transmitted signals;

means for separating said received signals into at least two signals, said update signal and said differential signal, the differential signal including any channel noise component;

first deriving means for providing a first derived signal which corresponds to said digital signal plus any error signal due to said channel noise component and including;

first combining means for combining said differential signal and a first feedback signal,

first accumulator means for accumulating the output signals of said first combining means during each said block, and

first storage means for storing the first accumulator means output signals, said storage means being coupled to supply said first feedback signal;

second deriving means for providing a second derived signal which corresponds to said error signal and including;

second combining means coupled to said first deriving means and said separating means for providing a final block value of said error signal,

second accumulator means coupled for accumulating said final block value and a second feedback signal during each said block, and

second storage means coupled to said second accumulator means output, said second storage means being coupled to supply said second feedback signal; and

third combining means for combining said first and second derived signals to provide a first output signal which corresponds to said digital signal.

17. The transmission system according to claim 16 wherein said first and second deriving means further include buffer means coupled in the path of each of said first and second feedback signal respectively and having a gain of approximately but not less than unity.

18. The transmission system according to claim 16 and wherein said second deriving means further includes third storage means coupled to said second storage means output for storing at least two blocks of said second feedback signal and for reversing the sequence of values of each said block.

19. A system for the transmission and reception of a digitally processed analog signal comprising:

source means for providing said analog signal;

processing means for digitizing said analog signal and providing a differential signal therefrom;

channel coding means for dividing said differential signal into blocks and providing an update signal for the last value of each block, said update signal being essentially error-immune;

means for transmitting at least said differential signal and said update signal;

means for receiving said transmutted signals;

means for separating said received signals into at least two signals, said update signal and said differential signal, the differential signal including any channel noise component;

first deriving means for utilizing said differential signals to provide a first derived signal which corresponds to said digitized analog signals plus any error signal due to channel noise;

second deriving means for utilizing both of said divided signals to provide a second derived signal which corresponds to said error signal;

means for combining said first and second derived signals to provide an output signal which corresponds to the digitized analog signal; and

means for converting said output signal to provide said analog signal.

20. The transmission system according to claim 19 wherein said analog signal is a audio signal.

21. The transmission system according to claim 19 wherein said analog signal is an electrocardiograph signal.

22. The transmission system according to claim 19 wherein said analog signal is a video signal.

23. A system for the transmission and reception of a digitally processed analog signal comprising:

source means for providing said analog signal;

processing means for digitizing said analog signal and providing a differential signal therefrom;

channel coding means for dividing said differential signal into blocks and providing an update signal for the last value of the digital signal of each block, said update signal being essentially error-immune;

means for transmitting at least said differential signal and said update signal;

means for receiving said transmitted signals;

means for separating said received signals into at least two signals, said update signal and said differential signal, the differential signal including any channel noise component;

first deriving means for utilizing said differential signals to provide a first derived signal which corresponds to said digitized analog signals plus any error signal due to channel noise;

second deriving means for utilizing both of said divided signals to provide a second derived signal which corresponds to said error signal and wherein said second deriving means includes backward integrating means for providing a reversed error signal and means for reversing said reversed signal;

means for combining said first and second derived signals to provide an output signal which corresponds to the digitized analog signal; and

means for converting said output signal to provide said analog signal.

24. A receiving unit for retrieving an analog signal which has been digitized, differentiated, encoded and transmitted, and which periodically includes at least one update value;

the unit comprising;

input means for receiving the transmitted signal;

demodulating means for demodulating the received signal;

decoding means for decoding the demodulated signal;

first integrating means coupled to the decoding means for providing a first signal which corresponds to the digitized analog signal and includes any error signal;

second integrating means coupled to the decoding means for providing a second signal which corresponds to said error signal;

means for combining said first and second signals to provide a first output signal which is free of any error signal; and

means for converting said first output signal to provide said original analog signal.

25. A receiving unit for retrieving an analog signal which has been digitized, differentiated, encoded and transmitted, and which periodically includes at least one update value;

the unit comprising;

input means for receiving the transmitted signal;

demodulating means for demodulating the received signal;

decoding means for decoding the demodulated signal;

first integrating means including a first integrator and coupled to the decoding means for providing a first signal which corresponds to the digitized analog signal and includes any error signal;

second integrating means coupled to the decoding means and including,

means for determining any difference between said update value and a predetermined signal value from said first integrating means,

a second integrator coupled for integrating said difference to provide a reversed error signal, and

means for reversing the sequence of values of said error signal for providing a second signal which corresponds to said error signal;

means for combining said first and second signals to provide a first output signal which is free of any error signal; and

means for converting said first output signal to provide said original analog signal.

26. A receiving unit according to claim 25 and wherein said digitized analog signal is twice differentiated, said transmitted signal includes a second update value, said first integrating means includes a third integrator, and said second integrating means includes a fourth integrator and second means for determining any difference between said second update value and a second predetermined value from said first integrating means.

27. A receiving unit for retrieving a digital information signal which has been differentiated, encoded and transmitted;

the unit comprising;

input means for receiving the transmitted signal;

demodulating means for demodulating the received signal;

decoding means for decoding the demodulated signal;

first integrating means coupled to the decoding means for providing a first signal which corresponds to the differentiated signal and includes any error signal;

second integrating means coupled to the decoding means for providing a second signal which corresponds to said error signal; and

means for combining said first and second signals to provide an output signal which is free of any error signal.

28. An error correcting circuit for use with a differential digital signal which includes an accurate update signal for each transmitted block of said digital signal, the circuit comprising:

means for receiving the transmitted signal;

means for separating said update signal from the remaining received signal;

first integrating means for integrating said remaining signal and providing a first output signal which may include an error signal;

detecting means using said update signal to detect any error in the last value in the corresponding block of said remaining signal and providing an error value;

second integrating means for integrating back from said error value and reconstructing said error signal for each said block; and

means coupled to said first and second integrating means for providing the corrected digital signal.

29. The error correcting circuit according to claim 28 wherein said differential signal was derived from a digitized analog signal.

30. A method for removing from a block of data any error signal due to channel noise, the method comprising the steps of:

developing a first signal representing the block of data and including said error signal;

developing an error signal value representing the final value of the block of said error signal;

developing a second signal in time reverse sequence in response to said error signal value;

developing a third signal representing said error signal in response to said second signal; and

subtracting said third signal from said first signal to remove said error signal therefrom.

31. A method for correcting an error in a differential digital signal which includes at least one accurate update value for each transmitted block of said signal, and comprising the steps of:

separating said update value from the remaining signal;

integrating each block of said remaining signal and providing a first output signal which may include an error signal;

detecting any difference between said update value and a predetermined value of said first output signal;

providing an error value in response to said difference;

integrating back from said error value and reversing the integrated signal to reconstruct said error signal; and

subtracting said error signal from said first output signal to provide a final output signal.

32. A method for correcting an error in a differential digital signal which includes at least two accurate update values for each transmitted block of said signal, and comprising the steps of:

receiving said transmitted signal;

separating said update values from the remaining received signal;

integrating each block of said remaining signal and providing a first output signal which may include a first error signal;

detecting any difference between a first one of said update values and a predetermined value of said first output signal and providing a first error value in response to said detected difference;

integrating back from said first error value to reconstruct said first error signal;

integrating said first output signal to provide a second output signal which may include a second error signal;

detecting any difference between a second one of said update values and a predetermined value of said second output signal and providing a second error value in response to said detected difference;

integrating back from said second error value and reversing the integrated signal to reconstruct said second error signal; and

subtracting said second error signal from said second output signal to provide an essentially error-free final output signal.

33. A method for the transmission and reception of a digital signal comprising the steps of:

providing a differential signal from said digital signal;

dividing said differential signal into blocks;

providing an update signal for the last value of each said block, said update signal being essentially immune to error caused by noise in the transmission channel;

transmitting at least said differential signal and said update signal;

receiving said transmitted signals;

separating said received signals into at least two signals, said update signal and said differential signal, the differential signal including any channel noise component;

utilizing said differential signal to provide a first derived signal which corresponds to said digital signal plus any error signal due to said channel noise component;

utilizing both of said divided signals second derived signal which corresponds to said error signal; and

combining said first and second derived signals to provide a first output signal which corresponds to said digital signal.

34. A method for retrieving an analog signal which has been digitized, differentiated, encoded and transmitted, and which periodically includes at least one update value, the method including the steps of:

receiving and demodulating the transmitted signal;

decoding the demodulated signal;

providing a first signal which corresponds to the digitized analog signal and includes any error signal;

determining any difference between said update value and a predetermined signal value from said first signal;

integrating backward from said difference value to provide a reversed error signal;

reversing the sequence of values of said error signal for providing a second signal which corresponds to said error signal;

combining said first and second signals to provide a first output signal which is free of any error signal; and

converting said first output signal to provide said original analog signal.