Insulator structure for amorphous silicon thin-film transistors

  • US 5,041,888 A
  • Filed: 07/16/1990
  • Issued: 08/20/1991
  • Est. Priority Date: 09/18/1989
  • Status: Expired due to Term
First Claim
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1. A semiconductor device comprising:

  • a substrate;

    a gate electrode disposed on said substrate;

    a first layer of silicon nitride disposed on said substrate and over said gate electrode, said first silicon nitride layer having a first silicon-to-nitrogen (Si;

    N) concentration ratio selected to provide optimum structural characteristics to said semiconductor device and having a first optical index corresponding to said first selected concentration ratio;

    a second layer of silicon nitride disposed on said first silicon nitride layer, said second silicon nitride layer having a second silicon-to-nitrogen (Si;

    N) concentration ratio selected to provide optimum electrical characteristics to said semiconductor device and having a second optical index corresponding to said second selected concentration ratio;

    said first optical index being greater than said second optical index;

    a first layer of amorphous silicon disposed on said second silicon nitride layer,a second layer of amorphous silicon disposed on said first silicon layer and doped to have a chosen conductivity;

    at least said second silicon layer being patterned to form a drain region and a source region, each of said regions partially overlying said gate electrode to cause a conductive channel between said source and drain regions through a portion of said first silicon layer lying therebetween when a voltage of proper polarity and magnitude is applied to said gate electrode relative to said source region;

    a source electrode in electrical contact with said source region; and

    a drain electrode in electrical contact with said drain region.

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