Multibit amplitude and phase modulation transceiver for LAN

• US 5,050,189 A
• Filed: 11/14/1988
• Issued: 09/17/1991
• Est. Priority Date: 11/14/1988
• Status: Expired due to Fees

• Current Assignee: Datapoint Corp. (Dynacore Holdings Corporation)
• Original Assignee: Datapoint Corp. (Dynacore Holdings Corporation)
• Inventors: Koos, Larry W., Lawrence, Charles, Fischer, Michael A., Cox, William M., Halpern, Peter H.
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): Smith, Ralph
• Application Number:
  US07/270,739
• Time in Patent Office: 1,037 Days
• Field of Search: 375/8, 375/9, 375/42, 375/96, 375/106, 375/110, 375/111, 375/112, 375/113, 375/7, 375/39, 375/20, 375/118, 375/19, 370/18, 370/105.3, 370/108, 340/825.2
• US Class Current: 375/223
• CPC Class Codes: H04L 25/03006 Arrangements for removing intersymbol interference
• CPC Class Codes: H04L 25/4919 using balanced multilevel codes H04L25/4927 takes precedence
• CPC Class Codes: H04L 7/0338 the correction of the phase error being performed by a feed forward loop

Abstract

A transceiver for a LAN is capable of communicating multiple bits per signal element to increase the data throughput of the LAN. The transceiver includes a transmitter which receives a multiple bit digital input value originating at a node of the LAN at which the transceiver is present. The transmitter converts the multiple bit digital input signal into a pulse-like analog signal which is amplitude and phase modulated. A receiver of a transceiver at a receiving node the transmitted analog signal converts its amplitude and phase into a corresponding multiple bit digital output value. A time-domain filter of the receiver creates a primary signal from the received analog signal. To sample the primary signal at its maximum amplitude point, a derivative of the primary signal waveform is used to establish the zero derivative point at which the primary signal attains its maximum amplitude, and to establish a fixed sampling point for subsequent signals. The sampling point is synchronized in phase with the stream of received analog signals. The residual intersymbol interference (ISI) effect of preceding signals on the LAN medium is eliminated prior to converting the primary signal to the digital value. To adjust and compensate for attenuation and amplification created by the LAN medium, the signal values are normalized.

Claims

1. A transceiver for communicating multiple bits per signal element between a plurality of nodes interconnected by a communication medium of a LAN, comprising:

transmitter means receptive of a multiple bit digital input value originating at the node, and operative for converting the digital input value into an analog signal having an amplitude and a phase which is defined by a predetermined correlation code to the bit pattern of the digital input value, said transmitter means further transmitting the analog signal over the medium to other nodes of the LAN; and

receiver means responsive to each received analog signal transmitted by another node over the medium, and operative for converting the amplitude and phase of the received analog signal into a multiple bit digital output value which has a bit pattern that corresponds to the bit pattern of the digital input value, said receiver means using the predetermined correlation code to make the conversion, said receiver means further comprising;

means receptive of the received analog signal and operative for supplying a primary signal having an amplitude related in a predetermined manner to the amplitude of the received analog signal;

means responsive to the characteristics of the primary signal for generating a sample clock signal which defines the point at which the amplitude of the primary signal is to be converted to the digital output value; and

means responsive to the sample clock signal for converting the amplitude of the primary signal to the digital output value.

2. A transceiver as defined in claim 1 wherein said sample clock signal generating means further comprises:

means for creating a derivative waveform corresponding to the mathematical derivative of the waveform of the primary signal;

zero detection means responsive to the derivative waveform for supplying a zero crossing signal whenever the derivative waveform is approximately zero; and

means responsive to the zero crossing signal for establishing the sample clock signal.

3. A transceiver as defined in claim 2 wherein said means receptive of the received analog signal further comprises:

time-domain filter means receptive of the received analog signal and operative for supplying a primary signal having an amplitude related in a predetermined manner to the amplitude of the received analog signal.

4. A transceiver as defined in claim 3 wherein:

the transmitter means transmits each analog signal as a pulse analog signal having predetermined time-domain characteristics; and

the time-domain filter means produces a maximum output energy in correspondence to a received pulse analog signal having the predetermined time-domain characteristics and substantially attenuates signals from the medium of other characteristics.

5. A transceiver as defined in claim 2 wherein the primary signals on the communication medium are each substantially in the form of a sine pulse waveform.

6. A transceiver as defined in claim 2 wherein said sample clock signal generating means further comprises:

threshold detector means responsive to the amplitude of the primary signal and operative for supplying a threshold signal whenever the amplitude of the primary signal exceeds a predetermined threshold value;

means for supplying an asynchronous signal upon the simultaneous occurrence of the zero crossing and threshold signals; and

synchronizing means for establishing the sample clock signal in response to the asynchronous signal.

7. A transceiver as defined in claim 6 wherein said transmitter means transmits the analog signals over the medium at a predetermined transmit frequency, and wherein:

said synchronizer means supplies the sample clock signal at a frequency which substantially corresponds to the transmit frequency and in a predetermined fixed phase relationship with the primary signals.

8. A transceiver as defined in claim 7 wherein said synchronizer means establishes the fixed phase relationship in response to a single calibration signal.

9. A transceiver as defined in claim 7 wherein the one analog signal which establishes the sample clock signal comprises:

a calibration signal which is periodically inserted in a serial stream of analog signals transmitted by the transmitter means; and

each calibration signal is of a predetermined amplitude and a predetermined phase.

10. A transceiver as defined in claim 9 wherein each calibration signal is immediately preceded and immediately followed by an interval of silence wherein no analog signal is transmitted, and said receiver means further comprises:

means responsive to the calibration signal for determining the amount of residual signal remaining on the medium during the immediately following interval of silence, the residual signal being an intersymbol interference (ISI) effect created by and related by a predetermined fraction to the preceding calibration signal; and

means for eliminating the ISI effect during the conversion of each analog signal into the corresponding digital output value of the analog signal.

11. A transceiver as defined in claim 10 wherein:

the ISI effect is a fractional value established by amplitude of the residual signal in the interval following the calibration signal relative to the amplitude of the calibration signal; and

said ISI effect elimination means multiplies the ISI fractional value and a value representative of the preceding converted analog signal to establish the amount of ISI effect on a currently received analog signal.

12. A transceiver as defined in claim 11 wherein:

said ISI elimination means further subtracts the amount of the ISI effect from a value representative of a current received analog signal to supply an ISI compensated value.

13. A transceiver as defined in claim 12 wherein said receiver means further comprises:

means for adjusting the gain of the receiver means to compensate for the effects of signal attenuation or signal amplification by the communication medium.

14. A transceiver as defined in claim 13 wherein said gain adjusting means comprises:

means for supplying a normalized value representative of the ISI compensated value relative to a value representative of the full amplitude of the calibration signal, the normalized value establishing the digital output value.

15. A transceiver as defined in claim 14 wherein:

said means for supplying a normalized value operatively divides the ISI compensated value by a value representative of the amplitude of the calibration signal.

16. A transceiver as defined in claim 15 wherein said receiver means further comprises:

thresholding means receptive of the normalized value and operative for classifying any fractional normalized value into the digital output value.

17. A transceiver as defined in claim 16 wherein the analog signals and the calibration signal on the communication medium are substantially in the form of a sine pulse waveform.

18. A transceiver for communicating multiple bits per signal element between a plurality of nodes interconnected by a communication medium of a LAN, comprising:

transmitter means receptive of a multiple bit digital input value originating at the node, and operative for converting the digital input value into an analog signal having an amplitude and a phase which is defined by a predetermined correlation code to the bit pattern of the digital input value, said transmitter means further transmitting the analog signal over the medium to other nodes of the LAN; and

receiver means responsive to each received analog signal transmitted by another node over the medium, and operative for converting the amplitude and phase of the received analog signal into a multiple bit digital output value which has a bit pattern that corresponds to the bit pattern of the digital input value, said receiver means using the predetermined correlation code to make the conversion, said receiver means further comprising;

means receptive of the received analog signal and operative for creating a derivative waveform corresponding to the mathematical derivative of the waveform of the analog signal;

means for supplying a derivative waveform which is a mathematical derivative of the primary signal;

means for converting the amplitude of the analog signal into a digital value; and

means responsive to the derivative waveform for establishing the point at which the converting means converts the amplitude of the analog signal into the digital value.

19. A transceiver as defined in claim 18 wherein the analog signals on the communication medium are each substantially in the form of a sine pulse waveform.

20. A transceiver as defined in claim 18 where said receiver means further comprises:

means receptive of the received analog signal and operative for supplying a primary signal having an amplitude related in a predetermined manner to the amplitude of the received analog signal; and

means responsive to the characteristics of the primary signal for generating a sample clock signal which defines the point at which the amplitude of the primary signal is to be converted to the digital output value, said sample clock signal generating means further comprising;

means for creating a derivative waveform corresponding to the mathematical derivative of the waveform of the primary signal;

zero detection means responsive to the derivative waveform for supplying a zero crossing signal whenever the derivative waveform is approximately zero; and

means responsive to the zero crossing signal for establishing the sample clock signal.

21. A transceiver as defined in claim 20 wherein said sample clock signal generating means further comprises:

threshold detector means responsive to the amplitude of the primary signal and operative for supplying a threshold signal whenever the amplitude of the primary signal exceeds a predetermined threshold value;

means for supplying an asynchronous signal upon the simultaneous occurrence of the zero crossing and threshold signals; and

synchronizing means for establishing the sample clock signal in response to the asynchronous signal.

22. A transceiver as defined in claim 21 wherein said transmitter means transmits the analog signals over the medium at a predetermined transmit frequency, and wherein:

said synchronizer means supplies the sample clock signal at a frequency which substantially corresponds to the transmit frequency and in a predetermined fixed phase relationship with the primary signals.

23. A transceiver as defined in claim 22 wherein the one analog signal which establishes the sample clock signal comprises:

a calibration signal which is periodically inserted in a serial stream of analog signals transmitted by the transmitter means; and

each calibration signal is of a predetermined amplitude and a predetermined phase.

24. A transceiver as defined in claim 23 wherein each calibration signal is immediately preceded and immediately followed by an interval of silence wherein no analog signal is transmitted, and said receiver means further comprises:

means responsive to the calibration signal for determining the amount of residual signal remaining on the medium during the immediately following interval of silence, the residual signal being an intersymbol interference (ISI) effect created by and related by a predetermined fraction to the preceding calibration signal; and

means for eliminating the ISI effect during the conversion of each analog signal into the corresponding digital output value of the analog signal.

25. A transceiver as defined in claim 24 wherein:

the ISI effect is a fractional value established by amplitude of the residual signal in the interval following the calibration signal relative to the amplitude of the calibration signal; and

said ISI effect elimination means multiplies the ISI fractional value and a value representative of the preceding converted analog signal to establish the amount of ISI effect on a currently received analog signal.

26. A transceiver as defined in claim 25 wherein:

said ISI elimination means further subtracts the amount of the ISI effect from a value representative of a current received analog signal to supply an ISI compensated value.

27. A transceiver as defined in claim 26 wherein said receiver means further comprises:

means for adjusting the gain of the receiver means to compensate for the effects of signal attenuation or signal amplification by the communication medium.

28. A transceiver as defined in claim 27 wherein said gain adjusting means comprises:

means for supplying a normalized value representative of the ISI compensated value relative to a value representative of the full amplitude of the calibration signal, the normalized value establishing the digital output value.

29. A transceiver as defined in claim 28 wherein:

said means for supplying a normalized value operatively divides the ISI compensated value by a value representative of the amplitude of the calibration signal.

30. A transceiver as defined in claim 29 wherein said receiver means further comprises:

thresholding means receptive of the normalized value and operative for classifying and fractional normalized value into the digital output value.

31. A transceiver as defined in claim 18 wherein said receiver means further comprises;

means for determining the amount of residual signal effect created by an immediately preceding received analog signal; and

means for eliminating the residual signal effect during the conversion of each received analog signal to the digital output value.

32. A transceiver as defined in claim 31 wherein said residual signal effect elimination means supplies a compensated signal, and further comprising:

thresholding means receptive of the compensated signal and operative for classifying any fractional compensated signal into one value of two most closely related digital output values.

41. A transceiver as defined in claim 31 wherein the analog signals on the communication medium are each substantially in the form of a sine pulse waveform.

33. A transceiver for communicating multiple bits per signal element between a plurality of nodes interconnected by a communication medium of a LAN, comprising:

transmitter means receptive of a multiple bit digital input value originating at the node, and operative for converting the digital input value into an analog signal having an amplitude and a phase which is defined by a predetermined correlation code to the bit pattern of the digital input value, said transmitter means further transmitting the analog signal over the medium to other nodes of the LAN; and

receiver means responsive to each received analog signal transmitted by another node over the medium, and operative for converting the amplitude and phase of the received analog signal into a multiple bit digital output value which has a bit pattern that corresponds to the bit pattern of the digital input value, said receiver means using the predetermined correlation code to make the conversion;

said receiver means further comprising;

means for determining the amount of residual signal effect created by one preceding received analog signal which is periodically inserted by the transmitter means in a stream of analog signals transmitted; and

means for eliminating the residual signal effect during the conversion of each of a plurality of subsequently received analog signals to the digital output value, based on the amount of residual signal effect determined from said one analog signal.

34. A transceiver as defined in claim 33 wherein said residual signal effect elimination means supplies a compensated signal, and further comprising:

thresholding means receptive of the compensated signal and operative for classifying any fractional compensated signal into one value of the two most closely related digital output values.

35. A transceiver as defined in claim 33 wherein said receiver means further comprises:

means for supplying a normalized value representative of the received analog signal relative to a predetermined value representative of the signal attenuation or signal amplification by the medium between a transmitting node and a receiving node.

36. A transceiver as defined in claim 35 further comprising:

thresholding means receptive of the normalized value and operative for classifying any fractional normalized value into one value of the two most closely related digital output values.

37. A transceiver for communicating multiple bits per signal element between a plurality of nodes interconnected by a communication medium of a LAN, comprising:

transmitter means receptive of a multiple bit digital input value originating at the node, and operative for converting the digital input value into an analog signal having an amplitude and a phase which is defined by a predetermined correlation code to the bit pattern of the digital input value, said transmitter means further transmitting the analog signal over the medium to other nodes of the LAN; and

receiver means responsive to each received analog signal transmitted by another node over the medium, and operative for converting the amplitude and phase of the received analog signal into a multiple bit digital output value which has a bit pattern that corresponds to the bit pattern of the digital input value, said receiver means using the predetermined correlation code to make the conversion, said receiver means further comprising;

means for supplying a normalized value representative of the received analog signal relative to a predetermined value representative of the signal attenuation or signal amplification by the medium between a transmitting node and a receiving node.

38. A transceiver as defined in claim 37 further comprising:

thresholding means receptive of the normalized value and operative for classifying any fractional normalized value into one value of the two most closely related digital output values.

39. A transceiver for communicating multiple bits per signal element between a plurality of nodes interconnected by a communication medium of a LAN, comprising:

transmitter means receptive of a multiple bit digital input value originating at the node, and operative for converting the digital input value into an analog signal having an amplitude and a phase which is defined by a predetermined correlation code to the bit pattern of the digital input value, said transmitter means further transmitting the analog signal over the medium to other nodes of the LAN; and

receiver means responsive to each received analog signal transmitted by another node over the medium, and operative for converting the amplitude and phase of the received analog signal into a multiple bit digital output value which has a bit pattern that corresponds to the bit pattern of the digital input value, said receiver means using the predetermined correlation code to make the conversion, said receiver means further comprising;

time-domain filter means receptive of the received analog signal and operative for supplying a primary signal having an amplitude related in a predetermined manner to the amplitude of the received analog signal.

40. A transceiver as defined in claim 39 wherein:

the transmitter means transmits each analog signal as a pulse analog signal having predetermined time-domain characteristics; and

the time-domain filter means produces a maximum output energy in correspondence to a received pulse analog signal having the predetermined time-domain characteristics and substantially attenuates signals from the medium of other characteristics.

42. A transceiver as defined in claim 39 wherein said receiver means further comprises:

means for determining the amount of residual signal effect created by an immediately preceding received analog signal; and

means for eliminating the residual signal effect during the conversion of each received analog signal to the digital output value.

43. A transceiver as defined in claim 42 wherein said residual signal effect elimination means supplies a compensated signal, and further comprising:

thresholding means receptive of the compensated signal and operative for classifying any fractional compensated signal into one value of two most closely related digital output values.

44. A transceiver for transmitting and receiving amplitude modulated analog signals occurring at a predetermined transmit frequency on a communication medium which interconnects a plurality of nodes of a LAN, at least some of the analog signals transmitted being calibration signals having a predetermined amplitude, the calibration signals having periodically inserted in a stream of data analog signals, said transceiver comprising an improved receiver means for receiving analog signals from the medium, comprising:

means responsive to the calibration signal received from the medium and operative for generating an asynchronous signal occurring in a predetermined time relationship to the calibration signal, the synchronous signal generating means generating the asynchronous signal in response to a predetermined analog characteristic of a single received calibration signal;

synchronizer means responsive to the asynchronous signal and operative for supplying a sample clock signal substantially at the predetermined transmit frequency and in a substantially fixed phase relationship relative to the received analog signals, the synchronizer means establishing the fixed phase relationship in response to the asynchronous signal; and

conversion means responsive to the sample clock signal for sampling the amplitude of a signal relative to the received analog signal at a point established by the sample clock signal.

45. A transceiver as defined in claim 44 wherein said synchronizer means establishes the fixed phase relationship in response to a single calibration signal.

46. A transceiver as defined in claim 45 further comprising:

transmitter means for transmitting the analog signals on the medium; and

means for supplying a reference clock signal to the transmitter means and the receiver means to establish the transmit frequency; and

wherein said synchronizer means further comprises;

means receptive of the reference clock signal for supplying a plurality of phase shifted versions of the reference clock signal, each phase shifted version being phase shifted by an approximately equal amount from the preceding and following phase shifted versions over the period of the reference clock signal; and

selection means responsive to the asynchronous signal and each of the phase shifted versions for establishing the sample clock signal from one of the phase shifted versions which undergoes a transition within a predetermined time relative to an event defined by the asynchronous signal.

47. A transceiver as defined in claim 46 wherein:

said means for supplying a plurality of phase shifted versions of the reference clock signal comprises a multi-tap delay line, and each tap of the multi-tap delay means supplies at least one phase shifted version.

48. A transceiver as defined in claim 47 wherein said selection means comprises:

register means receptive of all of the phase shifted versions and responsive to the asynchronous signal, for setting values therein which correspond to the states of the phase shifted versions upon the occurrence of the asynchronous signal; and

phase selecting means receptive of the values set in the register and operative for determining from those set values the one phase shifted version from which the sample clock signal is to be derived.

49. A transceiver as defined in claim 48 wherein:

said phase selecting means determines from the set values which one of the phase shifted versions or an inversion of a phase shifted version is to be supplied as the sample clock signal, and operatively supplies a selection control signal which identifies the one phase shifted version or the inversion thereof which is to be supplied; and

further comprising;

means receptive of the phase shifted versions and operative for supplying the phase shifted versions and for supplying inversions of the phase shifted versions as a selected signal from which the sample clock signal is derived in response to the selection control signal.

50. A transceiver as defined in claim 49 further comprising:

means receptive of the selected signal and operative for supplying the sample clock signal at a predetermined frequency which is substantially less than the reference clock signal, said sample clock signal supplying means creating a transition in the sample clock signal immediately upon the occurrence of the asynchronous signal and thereafter supplying transitions of the sample clock signal in coincidence with the transitions of the selected one of the phase shifted versions or inversions thereof.

51. A transceiver for transmitting and receiving amplitude modulated analog signals occurring at a predetermined transmit frequency on a communication medium which interconnects a plurality of nodes of a LAN, at least some of the analog signals transmitted being calibration signals having a predetermined amplitude, the calibration signals being periodically inserted in a stream of data analog signals, said transceiver comprising an improved receiver means for receiving analog signals from the medium, comprising:

means responsive to the received calibration signal for generating an asynchronous signal in a predetermined relationship to the calibration signal;

synchronizer means responsive to the asynchronous signal and operative for supplying a sample clock signal substantially at the predetermined transmit frequency and in a substantially fixed phase relationship relative to the received analog signals, the synchronizer means establishing the fixed phase relationship in response to the asynchronous signal; and

conversion means responsive to the sample clock signal for sampling the amplitude of a signal related to the received analog signal at a point established by the sample clock signal; and

wherein;

said conversion means responds to the sample clock signal to convert the maximum amplitude and phase of a primary signal representative of each received analog signal into an initial digital value; and

further comprising;

adjusting means responsive to the sample clock signal for adjusting the initial digital value to a different digital output value by substantially eliminating the effect of gain or attenuation from the medium.

52. A transceiver as defined in claim 51 wherein:

said adjusting means substantially eliminates the effect of gain or attenuation by mathematically dividing a value related to the initial digital value by the digital value of the maximum sampled amplitude of a received calibration signal to normalize the digital value before supplying it as the digital output value.

53. A transceiver as defined in claim 52 further comprising:

thresholding means receptive of the normalized digital value for classifying any fractionalized digital value into one value of the two most closely related predetermined digital output values.

54. A transceiver for transmitting and receiving amplitude modulated analog signals occurring at a predetermined transmit frequency on a communication medium which interconnects a plurality of nodes of a LAN, at least some of the analog signals transmitted being calibration signals having a predetermined amplitude, the calibration signals being periodically inserted in a stream of data analog signals, said transceiver comprising an improved receiver means for receiving analog signals from the medium, comprising:

means responsive to the received calibration signal for generating an asynchronous signal in a predetermined relationship to the calibration signal;

synchronizer means responsive to the asynchronous signal and operative for supplying a sample clock signal substantially at the predetermined transmit frequency and in a substantially fixed phase relationship relative to the received analog signals, the synchronizer means establishing the fixed phase relationship in response to the asynchronous signal;

conversion means responsive to the sample clock signal for sampling the amplitude of a signal related to the received analog signal at a point established by the sample clock signal;

conversion means responsive to the sample clock signal for converting the maximum amplitude and phase of each received analog signal into an initial digital value; and

adjusting means responsive to the sample clock signal for adjusting the initial digital value to a different digital output value by substantially eliminating the effect of intersymbol interference (ISI).

55. A transceiver as defined in claim 54 wherein each calibration signal is immediately followed by a silent interval wherein no analog signal is transmitted, and further comprising:

means responsive to a residual signal on the medium during the silent interval which follows the calibration signal and operative for latching the value of the residual signal as an ISI value between sequential calibration signals;

means responsive to the calibration signal and operative for latching the maximum amplitude of the calibration signal as a peak value between sequential calibration signals; and

means receptive of the ISI value and the peak value for dividing the ISI value by the peak value to obtain an ISI compensation factor.

56. A transceiver as defined in claim 55 wherein:

said adjusting means substantially eliminates the effect of intersymbol interference by mathematically multiplying the digital output value by the value of the ISI compensation factor and subtracting the result of the multiplication from the initial digital value derived from a received analog signal.