Single substrate microwave radar transceiver including flip-chip integrated circuits

• US 5,115,245 A
• Filed: 09/04/1990
• Issued: 05/19/1992
• Est. Priority Date: 09/04/1990
• Status: Expired due to Term

• Current Assignee: Delco Electronics Corporation (Motors Liquidation Co. GUC Trust), Raytheon Company (Rtx Corporation)
• Original Assignee: Delco Electronics Corporation (Motors Liquidation Co. GUC Trust), Hughes Aircraft Company (Rtx Corporation)
• Inventors: Gulick, Jon, Wooldridge, John J., Mendolia, Gregory S., Higdon, William D., Wen, Cheng P., Siracusa, Mario, Maieron, Joseph J.
• Primary Examiner(s): Sotomayor, John B.
• Application Number:
  US07/576,915
• Time in Patent Office: 623 Days
• Field of Search: 342/175, 342/70, 343/700 MS
• US Class Current: 342/175
• CPC Class Codes: G01S 2013/93272 in the back of the vehicles
• CPC Class Codes: G01S 2013/93275 in the bumper area
• CPC Class Codes: G01S 7/032 Constructional details for solid-state radar subsystems
• CPC Class Codes: H01P 1/047 Strip line joints
• CPC Class Codes: H01P 11/00 Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
• CPC Class Codes: H01P 5/02 with invariable factor of coupling H01P5/12 takes precedence choke joints H01P1/04, H01P1/06
• CPC Class Codes: H01Q 21/065 Patch antenna array

Abstract

A microwave radar transceiver assembly (30) includes a monolithic microwave integrated circuit (MMIC) chip (58) having a coplanar waveguide transmssion lines (100, 102, 104) formed on the same surface (58a) as the electronic elements thereof. Coplanar waveguide transmission lines (68, 70, 72) are also formed on a surface (62a) of a substrate (62). The transceiver chip (58), in addition to other chips (56, 60), are mounted on the substrate (62) in a flip-chip arrangement, with the respective surfaces (58a, 62a) on which the transmission lines (100, 102, 104; 68, 70, 72) are formed facing each other. Electrically conductive bumps (106, 108, 110) are formed on portions of the transmission lines (100, 102, 104) of the chips (56, 58, 60) which are to be interconneced with the transmission lines (68, 70, 72) of the substrate (62), and solder (114) is formed on the portions of the transmission line (68, 70, 72) of the substrate (62) which are to be interconnected with the transmission lines (100, 102, 104) of the chips (56, 68, 60). The bumps (106, 108, 110) provide spacing between the mating surfaces (58a, 62a) of the substrate (62) and chips (56, 68, 60), and isolation between electronic elements on the chips (56, 58, 60).

Claims

1. A microwave radar assembly, comprising:

an electrically insulative substrate having a surface;

coplanar microwave transmission line means formed on said surface of the substrate;

a microwave radar integrated circuit chip having a surface; and

coplanar microwave transmission line means formed on said surface of the radar chip;

the radar chip being mounted on the substrate with said surface of the radar chip facing said surface of the substrate, wherein portions of the transmission line means of the substrate to be interconnected with respective portions of the transmission line means of the radar chip are aligned with each other, and the transmission line means of the radar chip being electrically interconnected with the transmission line means of the substrate, wherein solder is formed on said portions of the transmission line means of the substrate and is fused with said respective portions of the transmission lines means of the radar chip.

2. An assembly as in claim 1, in which the radar chip is a radar transceiver chip, the assembly further comprising:

a signal processing integrated circuit chip for processing an output signal from the transceiver chip, the signal processing chip having a surface; and

coplanar microwave transmission line means formed on said surface of the signal processing chip;

the signal processing chip being mounted on the substrate with said surface of the signal processing chip facing said surface of the substrate, and the transmission line means of the signal processing chip being electrically interconnected with the transmission line means of the substrate.

3. An assembly as in claim 1, in which the radar chip is a radar transceiver chip, the assembly further comprising:

a power conditioning integrated circuit chip for supplying regulated electrical power to the transceiver chip, the power conditioning chip having a surface;

coplanar microwave transmission line means formed on said surface of the power conditioning chip;

the power conditioning chip being mounted on the substrate with said surface of the power conditioning chip facing said surface of the substrate, and the transmission line means of the power conditioning chip being electrically interconnected with the transmission line means of the substrate.

4. An assembly as in claim 1, in which:

the radar chip is a transceiver chip;

the substrate has a second surface which is opposite to said surface thereof;

the assembly further comprises;

a planar radar antenna means formed on the second surface of the substrate; and

interconnect means extending through the substrate and electrically interconnecting the transceiver chip with the antenna means.

5. An assembly as in claim 4, in which the interconnect means comprises at least one via.

6. An assembly as in claim 4, in which:

the antenna means comprises a transmitting antenna and a receiving antenna;

the interconnect means comprises a first via interconnecting the transceiver chip with the transmitting antenna, and a second via interconnecting the transceiver chip with the receiving antenna.

7. An assembly as in claim 1, in which the transmission line means of the radar chip is electrically interconnected with the transmission line means of the substrate by soldering.

8. An assembly as in claim 1, in which:

the transmission line means of the radar chip comprises a plurality of transmission lines, each including a signal conductor and a ground conductor;

the transmission line means of the substrate comprises ground conductor means;

the assembly further comprises a plurality of spacer means which electrically interconnect the ground conductors of the transmission lines of the radar chip with the ground conductor means of the substrate and maintain said surfaces of the radar chip and substrate spaced from each other by a predetermined distance.

9. An assembly as in claim 8, in which the spacer means are formed on the ground conductors of the radar chip, and electrically interconnected with the ground conductors of the substrate by soldering.

10. An assembly as in claim 8, in which the spacer means comprise bumps.

11. An assembly as in claim 8, in which said predetermined distance is at least approximately six times the spacing between the signal conductors and respective ground conductors of the transmission lines of the radar chip.

12. An assembly as in claim 1, in which:

the transmission line means of the radar chip comprises a plurality of transmission lines, each including a signal conductor and a ground conductor;

the assembly further comprises spacer means which maintain said surfaces of the radar chip and substrate spaced from each other by a predetermined distance;

said predetermined distance being at least approximately six times the spacing between the signal conductors and respective ground conductors of the transmission lines of the radar chip.