Complementary field effect transistors having strained superlattice structure

• US 5,155,571 A
• Filed: 08/06/1990
• Issued: 10/13/1992
• Est. Priority Date: 08/06/1990
• Status: Expired due to Term

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: Woo, Jason C., Wang, Kang L.
• Primary Examiner(s): Prenty, Mark V.
• Application Number:
  US07/563,038
• Time in Patent Office: 799 Days
• Field of Search: 357/42, 357/23.2, 357/16, 357/4, 357/22, 357/23.7, 357/59, 357/61
• US Class Current: 257/19
• CPC Class Codes: H01L 27/0605 integrated circuits made of compound material, e.g. AIIIBV
• CPC Class Codes: H01L 27/092 complementary MIS field-effect transistors
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility

Abstract

The carrier mobilities for both electrons and holes in complementary field effect transistor structures such as CMOS and CMOD devices are increased by using strained Ge_x Si_1-x /Si layers for the carrier conduction channels. The carrier mobilities for the holes and electrons can be of substantially the same magnitude which is advantageous for complementary logic applications. The complementary FET structures can be advantageously employed with bipolar devices in integrated circuits.

Claims

1. A complementary field effect transistor device comprising

a substrate and a plurality of epitaxial semiconductor layers grown thereon,

an n-channel field effect transistor formed in a first epitaxial layer having n-type source and drain regions and a channel region, and

a p-channel field effect transistor formed in a second epitaxial layer and having p-type source and drain regions and a channel region, said second epitaxial layer including a strained germanium-silicon alloy layer in the channel region.

said p-channel field effect transistor being formed in a first isolated region of said second epitaxial layer and having a channel region composed of a lower layer of strained germanium-silicon alloy and an unstrained silicon layer formed on said strained germanium-silicon alloy, and said n-channel field effect transistor being formed in a second isolated region of said first epitaxial layer and having a channel region including an unstrained germanium-silicon alloy layer, a silicon layer formed on said unstrained germanium-silicon layer, and a strained germanium-silicon alloy layer formed on said silicon layer, and

whereby the carrier mobilities in the channel regions of the n-channel and p-channel field effect transistors are comparable.

2. A complementary modulation doped field effect transistor device comprising

a substrate and a plurality of semiconductor layers grown thereon,

a p-channel field effect transistor formed in a first isolated region of a first semiconductor layer and having a channel composed of a lower layer of strained germanium-silicon alloy and an unstrained silicon layer formed on said strained germanium-silicon alloy, and

an n-channel field effect transistor formed in a second isolated region of a second semiconductor layer and having a channel including an unstrained germanium-silicon alloy layer, a silicon layer formed on said unstrained germanium-silicon layer, and a strained germanium-silicon alloy layer formed on said silicon layer,

whereby the carrier mobilities in the channels of the n-channel and p-channel field effect transistors are comparable.

3. The complementary modulation doped field effect transistor device as defined by claim 2 wherein said substrate comprises p-doped silicon.