Programmable compensation of bridge circuit thermal response

• US 5,197,334 A
• Filed: 06/04/1991
• Issued: 03/30/1993
• Est. Priority Date: 06/04/1991
• Status: Expired due to Fees

• Current Assignee: Schlumberger Industries Incorporated (Schlumberger NV)
• Original Assignee: Schlumberger Industries Incorporated (Schlumberger NV)
• Inventors: Guziak, Robert A.
• Primary Examiner(s): WOODIEL, DONALD
• Application Number:
  US07/710,215
• Time in Patent Office: 665 Days
• Field of Search: 73/708, 73/766, 73/720, 73/721, 73/726, 73/727, 73/754, 73/DIG. 4, 73/862.48, 73/862.65, 73/862.474, 73/862.623, 73/862.628, 323/367, 323/365, 323/366, 323/1 R, 364/571.03, 364/508, 364/509, 364/558, 324/725
• US Class Current: 73/708
• CPC Class Codes: G01L 1/2281 for temperature variations
• CPC Class Codes: G01L 9/045 with electric temperature compensating means non electric temperature compensating means G01L19/04

Abstract

The present invention provides compensation for temperature in a transducer by connecting the adjustment resistors to the transducer itself to provide a correct transducer output. A number of switches are used to couple the adjustment resistors to the transducer circuit. An individual resistor may be coupled in parallel or in series with a transducer resistance. The control input for the switches are each coupled to a separate bit output of a multiple bit memory. The memory is programmed to control the duty cycle of the switches when addressed.

Claims

1. An apparatus for adjusting the value of a combined resistance in a measurement circuit, comprising:

a plurality of adjustment resistors coupled to said measurement circuit;

a plurality of switching means, each coupled to one of said adjustment resistors, for varying a combined value of said plurality of adjustment resistors by disconnecting one of said adjustment resistors or by switching a second adjustment resistor into or out of parallel with said adjustment resistor;

a memory having a multiple bit output, each of said bit outputs being coupled to a control input of one of said switching means, said memory being programmed such that each bit position in sequentially addressed words controls the duty cycle of one of said switching means to vary the effective resistance of one of said adjustment resistors; and

means for addressing said memory.

2. The apparatus of claim 1 wherein said memory is a programmable read only memory.

3. The apparatus of claim 1 wherein said means for addressing said memory comprises a counter having its output coupled to the address inputs of said memory and a clock having its output coupled to an input of said counter.

4. The apparatus of claim 1 wherein said measurement resistors form a bridge circuit having four legs, and two of said adjustment resistors are coupled in series with two of said legs while another two of said adjustment resistors are coupled in parallel with another two of said legs.

5. A bridge circuit pressure transducer comprising:

four pressure sensitive resistors coupled in a bridge formation with first and second opposite resistors increasing in resistance with pressure and third and fourth opposite resistors decreasing in resistance with pressure;

a source resistor coupled between a junction of said first and fourth resistors and an input terminal;

a parallel resistor coupled between said input terminal and a junction of said second and third resistors;

first and fourth control resistors coupled in parallel with said first and fourth resistors;

second and third control resistors coupled in series with said second and third resistors;

first and fourth switching means coupled in series with said first and fourth control resistors;

second and third switching means coupled in parallel with said second and third control resistors;

fifth switching means coupled in parallel with said source resistors;

sixth switching means coupled in parallel with said parallel resistor;

programmable memory having a plurality of bit outputs, each bit output being coupled to a control input of a different one of said switching means;

a counter having an output coupled to said programmable memory;

a clock having an output coupled to an input of said counter; and

a low-pass filter having a first input coupled to a junction of said first and second resistors and a second input coupled to a junction of said third and fourth resistors.