Heat dissipating device

• US 5,223,747 A
• Filed: 06/17/1991
• Issued: 06/29/1993
• Est. Priority Date: 06/15/1990
• Status: Expired due to Fees

• Current Assignee: Battelle-Institut EV
• Original Assignee: Battelle-Institut EV
• Inventors: Tschulena, Guido
• Primary Examiner(s): Hille, Rolf
• Assistant Examiner(s): OSTROWSKI, DAVID M
• Application Number:
  US07/716,320
• Time in Patent Office: 743 Days
• Field of Search: 357/81, 357/82, 361/385, 165/80.3, 165/80.4, 257/713, 257/714, 257/722
• US Class Current: 257/713
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/4823 connecting the wire to a pin of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/4275 by melting or evaporation of solids
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/10158 at the passive surface
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/1301 Thyristor
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/16152 Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Abstract

Heat dissipating devices for electronic component semiconductor chips are provided in the form of channels or grooves which are either integrated in the underside of the semiconductor chip or are formed in an additional thin semiconductor chip which has larger dimensions than the component chip and which is disposed between the underside of the component chip and the mounting base for the component chip. The channels are filled with a meltable material which is subjected to a heat absorbing phase conversion at temperatures which are critical for semiconductor component operation. In this way, short-term heat peaks in particular, can be reliably dissipated. Preferably, the channels are formed by micromechanical etching techniques and are preferably filled to the desired degree by a spin coating process.

Claims

1. A heat dissipating arrangement for semiconductor electronic components comprising:

a chip of semiconductor material having a front surface with a semiconductor circuit component formed therein and a rear surface;

a plurality of heat dissipation grooves provided in said rear surface of said semiconductor chip;

at least one meltable substance disposed in said grooves with said at least one substance being a substance which is subjected to a heat absorbing phase conversion from solid to liquid when a predetermined temperature which is critical for operation of said semiconductor component is exceeded; and

a housing base fastened to said rear surface of said semiconductor chip.

2. A heat dissipating device as defined in claim 1 wherein said at least one meltable substance has a high melting heat, exhibits little expansion between the solid and the liquid state, and is compatible with the materials and techniques of said semiconductor material.

3. A heat dissipating arrangement as defined in claim 2 wherein said semiconductor material is silicon and said at least one meltable substance has a melting point less than 150°

C.

4. A heat dissipating arrangement as defined in claim 3 wherein said melting point is in a range from 100°

C. to 150°

C.

5. A heat dissipating arrangement as defined in claim 3 wherein said at least one meltable substance is composed of at least one of tin, indium, other low melting point metal alloys, waxes, stearin, and combinations thereof.

6. A heat dissipating arrangement as defined in claim 1 wherein said grooves have a width and a spacing which are each of from about 50μ

to 200μ

, and a depth of from about 50% to 90% of the thickness of said semicondutor chip.

13. A heat dissipation arrangement as defined in claim 6 wherein said semiconductor chip has a maximum thickness of approximately 600 μ

m.

7. A heat dissipation arrangement for a semiconductor electronic component comprising:

a housing base;

a semiconductor heat dissipating chip having a rear surface fastened to said base and a front surface;

a semiconductor component chip having a rear surface bonded to said front surface of said heat dissipating chip;

a plurality of grooves formed in said rear surface of said heat dissipation chip; and

a solid meltable material disposed in and at least partially filling said grooves, said material having a melting point less than a predetermined temperature critical for proper operation of said semiconductor component and undergoing a heat absorbing phase conversion from solid to liquid when heated to exceed said predetermined temperature.

8. A heat dissipation arrangement as defined in claim 7 wherein said heat dissipation chip is larger in area than said component chip.

9. A heat dissipation arrangement as defined in claim 8 wherein the semiconductor material of at least said component chip is silicon and said melting point of said meltable material is in the range of 100°

C. to 150°

C.

10. A heat dissipation arrangement as defined in claim 7 wherein said meltable material is at least one of a metal, a metal alloy, bees wax and stearin.

11. A heat dissipation arrangement as defined in claim 7 wherein said grooves have a width and a spacing which are each of from about 50μ

to 200μ

.

12. A heat dissipation arrangement as defined in claim 11 wherein said grooves have a depth of from about 50 to 90% of the thickness of said heat dissipating semiconductor chip.

14. A heat dissipation arrangement as defined in claim 12 wherein said semicondutor chip has a maximum thickness of approximately 600 μ

m.